128M sdram issues

hi,everyone
I am upgrading my sdram configuration for 128M,
Frist of all,I show my platform,
CPU : Xscale pxa255
OS : Windows CE .Net 4.2
Flash : 32MB
SDRAM : 128MB (32MBX4)
since I have heard that it only spend 2 hours on this issue,
why it cost me more than one week to solve the problem...

Okay,let's see the process.
I modified some files related,
config.bib,memdefs.h,memmap.inc,xsc1.h,xsc1.inc,xsc1bd.h,xsc1bd.inc,
fwxsc1.s,platform.reg.(if i missed some file,pls tell me)
At first,i always modified all of files related,
then the kernel hung...I can not find where is the problem,
so,I modified some files step by step,
I just changed OEMAddressTable in memmap.inc,
DCD 0x80000000, 0xA0000000, 64
to
DCD 0x80000000, 0xA0000000, 128


and I also modified xsc1bd.inc,
MDCNFG_VAL EQU 0x19C119C1; SDRAM Config Reg (CL=2)
to
MDCNFG_VAL EQU 0x19C319C3; SDRAM Config Reg (CL=2)
then,sdram register MDCNFG enable the bank1 which is also 64MB.
After two changes above,I download the kernel,it still works.


Then,I just modified config.bib


MEMORY
IF IMGFLASH !
NK 800B8000 02000000 RAMIMAGE ; SDRAM 32MB: [800B 8000 ->
820B
7FFF]
RAM 820B8000 01C00000 RAM ; SDRAM 28MB: [820B 8000 ->
83CB
7FFF]
EDBG 83F8D000 00020000 RESERVED ; x20000 for EBOOT - 3 Client
memory pools of 24K (128K)
ENDIF
AUD_DMA 83CB8000 0000A000 RESERVED
SLEEP_SAV 83CC2000 00001000 RESERVED
DRV_GLB 83CC3000 00001000 RESERVED
CACHE_FLG 83CC4000 0003C000 RESERVED ; for use by cache routines:
83CC_4000->83CC_4003 used for flagging. 83CC_4004->83CC_4803 rsvd for
miniD
DISPLAY 83D00000 00130000 RESERVED ; 1MB aligned
BLOCK_BUF 83E30000 00080000 RESERVED
UNUSED_BUF 83EB0000 000DD000 RESERVED
whql_sig 00000001 00002000 EXTENSION ; WHQL signature extension
(6KB).
ZBANK 86000000 00100000 RESERVED


to


IF IMGFLASH !
NK 800B8000 02000000 RAMIMAGE ; SDRAM 32MB
RAM 820B8000 05C00000 RAM ; SDRAM 28MB+64MB
EDBG 87F8D000 00020000 RESERVED ; x20000 for EBOOT - 3 Client
memory pools of 24K (128K)
ENDIF
AUD_DMA 87CB8000 0000A000 RESERVED
SLEEP_SAV 87CC2000 00001000 RESERVED
DRV_GLB 87CC3000 00001000 RESERVED
CACHE_FLG 87CC4000 0003C000 RESERVED ; for use by cache routines:
83CC_4000->83CC_4003 used for flagging. 83CC_4004->83CC_4803 rsvd for
miniD
DISPLAY 87D00000 00130000 RESERVED ; 1MB aligned
BLOCK_BUF 87E30000 00080000 RESERVED
UNUSED_BUF 87EB0000 000DD000 RESERVED
whql_sig 00000001 00002000 EXTENSION ; WHQL signature extension
(6KB).
ZBANK 8A000000 00100000 RESERVED


and also changed the other related addresses
in memdefs.h,xsc1.h,xsc1.inc,xsc1bd.h,xsc1bd.inc.
for instance:
i modified
#define MEM_BASE_PHYSICAL 0xA3CB8000
#define MEM_BASE_C_VIRTUAL 0x83CB8000
#define EDBG_PHYSICAL_MEMORY_START 0x83F8D000 // Ethernet
Debugger
Pool Address
to
#define MEM_BASE_PHYSICAL 0xA7CB8000
#define MEM_BASE_C_VIRTUAL 0x87CB8000
#define EDBG_PHYSICAL_MEMORY_START 0x87F8D000 // Ethernet
Debugger
Pool Address
It seems that all the PHYSICAL address should not be modified,
I try it before,but also do not work out..
so at last,I made the above change.


And during these days,I also tried to debug images,
but it just hung as the release image..
anyway,my system hung here:
****** Downloading operating system image for SDRAM target ******


TFTP: Desktop losing ACK, block number = 54250, Ack again
rom_offset=0x0.
Found pTOC signature.
ROMHDR at Address 800B8044h
RomHdr.ulRAMStart=81C50000h RomHdr.physfirst=800B8000h.
Done.
Writing 0x80076BD8 to flash address 0xBC340000 (length=0xA40).
Sector=0x200 (Length=0x6) Block=0x1 (Length=0x1).
Handling non-block aligned data...
FlashErase: Unlocking flash block(s) [0x1, 0x1] (please wait): Done.
Erasing flash block(s) [0x1, 0x1] (please wait): .Done.
Writing to flash (please wait): Done.
Got EDBG_CMD_JUMPIMG
Got EDBG_CMD_CONFIG, flags:0x00000000
Download successful! Jumping to image at physical 0xA00B9000...
Begin
******************************************************
******************************************************
******************************************************
******************************************************
******************************************************
OEMInitDebugSerial using UART2
Windows CE Kernel for ARM Built on Mar 13 2003 at 22:54:19
ProcessorType=02d0 Revision=6
sp_abt=ffff5000 sp_irq=ffff2800 sp_undef=ffffc800 OEMAddressTable =
800b9ef8
Sp=ffffc7cc
///////////////////////////////////////


and the debug kernel output here:
normal 64M:


Download successful! Jumping to image at physical 0xA00B9000...
Begin
******************************************************
******************************************************
******************************************************
******************************************************
******************************************************
OEMInitDebugSerial using UART2
Windows CE Kernel for ARM Built on Mar 13 2003 at 22:43:27
ProcessorType=02d0 Revision=6
sp_abt=ffff5000 sp_irq=ffff2800 sp_undef=ffffc800 OEMAddressTable =
800b9ef4
+OEMKitlInit
(D) Before OEMEthInit


(D)(OEMEthInit)


Checking CS8900A Devices..
CS8900A Ethernet Controller Already Initilaized: OK
VBridgeInit()...TX = [16384] bytes -- Rx = [16384] bytes


Tx buffer [0xA2D302E0] to [0xA2D342E0].


[0xA2D2C2C0] to [0xA2D302C0].


ridge:: NK add MAC: [0-B-29-FF-55-66]


p Driver_Globals (ether stuff only) at : 0xA3CC3000
pDriverGlobals->eth.EbootMagicNum= 0x45424F54
pDriverGlobals->eth.etherEnabled= 0x0
pDriverGlobals->eth.etherFlags= 0x0
pDriverGlobals->eth.TargetAddr.dwIP= 0x508412AC
pDriverGlobals->eth.TargetAddr.wMAC= 0xA3CC3910
pDriverGlobals->eth.TargetAddr.wPort= 0xD403
pDriverGlobals->eth.DownloadHostAddr.dwIP= 0x5B8412AC
pDriverGlobals->eth.DownloadHostAddr.wMAC= 0xA3CC3920
pDriverGlobals->eth.DownloadHostAddr.wPort= 0x1E04
pDriverGlobals->eth.DbgHostAddr.dwIP= 0x0
pDriverGlobals->eth.DbgHostAddr.wMAC= 0xA3CC392C
pDriverGlobals->eth.DbgHostAddr.wPort= 0x0
pDriverGlobals->eth.KdbgHostAddr.dwIP= 0x0
pDriverGlobals->eth.KdbgHostAddr.wMAC= 0xA3CC3938
pDriverGlobals->eth.KdbgHostAddr.wPort= 0x0
pDriverGlobals->eth.PpshHostAddr.dwIP= 0x0
pDriverGlobals->eth.PpshHostAddr.wMAC= 0xA3CC3944
pDriverGlobals->eth.PpshHostAddr.wPort= 0x0
pDriverGlobals->eth.SubnetMask= 0xC0FFFFFF
pDriverGlobals->eth.DHCPLeaseTime= 0x0
pDriverGlobals->eth.EdbgFlags= 0x1


OEMether IP Addr: 172.18.132.80


OEMether IP netmask: 255.255.255.192


(D)(OEMEthInit) SysIntrVal = EDBG_SYSINTR_NOINTR
(D) After OEMEthInit
Device XSBase25521862, IP 172.18.132.80, Port 981
(D) Before KitlEtherInit
Calling EdbgInitDHCP


(D) After KitlEtherInit
-OEMKitlInit
Host connected


Host IP: 172.18.132.91, port 1050


KeyIndex 0 = -1
KeyIndex 1 = -1
KeyIndex 2 = -1
KeyIndex 3 = -1
KeyIndex 4 = -1
KeyIndex 5 = -1
KeyIndex 6 = -1
KeyIndex 7 = -1
+KITLRegisterDfltClient, service:0
+KITLRegisterDfltClient, service:1
KITLGlobalState == 0x61
KITL Initialized
Waiting for service 'DBGMSG' to connect..., fUseSysCalls = 0
ProcessAdminMsg: Receive Config message for service DBGMSG
ProcessAdminMsg: Receive Config message for service PPSH
ProcessAdminMsg: Receive Config message for service DBGMSG
ProcessAdminMsg: Receive Config message for service PPSH
ProcessAdminMsg: Receive Config message for service DBGMSG
ARMInit done.
+KITLRegisterDfltClient, service:2
ProcessAdminMsg: Receive Config message for service KDBG
ProcessAdminMsg: Receive Config message for service KDBG
KITL: Leaving polling mode...
KITL Checking client registrations
+RegisterClientPart2: Id 0x00000000
KITL Timer thread started, (hTh: 0x03CB4FDE, pTh: 0x83C80000)
-RegisterClientPart2
+RegisterClientPart2: Id 0x00000001
-RegisterClientPart2
VBridge:: VB_INITIALIZED returns [1]


VBridgeInit()...TX = [16384] bytes -- Rx = [16384] bytes


buffer [0xA2D302E0] to [0xA2D342E0].


buffer [0xA2D2C2C0] to [0xA2D302C0].


0x83a645a8: TAPI:OldAddTapiDevice - This BSP is loading TSPs by old
method!!! Change registry settings to use new way!!!
OEMEthCurrentPacketFilter set to [0xB]


VBridge:: Current VMini packet filter = [0xB]


CS8900: Set receive packet filter [Filter=0xB, RxCTL=0xF05].


OEMEthMulticastList():: No of Entries [1]


[0] : 1 - 0 - 5E - 0 - 0 - 1


OEMEthMulticastList returning [1]


CS8900: Multicast[1 of 1] = 1-0-5E-0-0-1


CS8900: Logical Address Filter = 40.0.0.0.


////////////////////////////////////////
128M hung:
Download successful! Jumping to image at physical 0xA00B9000...
Begin
******************************************************
******************************************************
******************************************************
******************************************************
******************************************************
OEMInitDebugSerial using UART2
Windows CE Kernel for ARM Built on Mar 13 2003 at 22:43:27
ProcessorType=02d0 Revision=6
sp_abt=ffff5000 sp_irq=ffff2800 sp_undef=ffffc800 OEMAddressTable =
800b9ef8
+OEMKitlInit
(D) Before OEMEthInit


(D)(OEMEthInit)


Checking CS8900A Devices..
CS8900A Ethernet Controller Already Initilaized: OK
VBridgeInit()...TX = [16384] bytes -- Rx = [16384] bytes


buffer [0xA2D302E0] to [0xA2D342E0].


buffer [0xA2D2C2C0] to [0xA2D302C0].


NK add MAC: [0-B-29-FF-55-66]


Dump Driver_Globals (ether stuff only) at : 0xA7CC3000
pDriverGlobals->eth.EbootMagicNum= 0x45424F54
pDriverGlobals->eth.etherEnabled= 0x0
pDriverGlobals->eth.etherFlags= 0x0
pDriverGlobals->eth.TargetAddr.dwIP= 0x508412AC
pDriverGlobals->eth.TargetAddr.wMAC= 0xA7CC3910
pDriverGlobals->eth.TargetAddr.wPort= 0xD403
pDriverGlobals->eth.DownloadHostAddr.dwIP= 0x5B8412AC
pDriverGlobals->eth.DownloadHostAddr.wMAC= 0xA7CC3920
pDriverGlobals->eth.DownloadHostAddr.wPort= 0x6804
pDriverGlobals->eth.DbgHostAddr.dwIP= 0x0
pDriverGlobals->eth.DbgHostAddr.wMAC= 0xA7CC392C
pDriverGlobals->eth.DbgHostAddr.wPort= 0x0
pDriverGlobals->eth.KdbgHostAddr.dwIP= 0x0
pDriverGlobals->eth.KdbgHostAddr.wMAC= 0xA7CC3938
pDriverGlobals->eth.KdbgHostAddr.wPort= 0x0
pDriverGlobals->eth.PpshHostAddr.dwIP= 0x0
pDriverGlobals->eth.PpshHostAddr.wMAC= 0xA7CC3944
pDriverGlobals->eth.PpshHostAddr.wPort= 0x0
pDriverGlobals->eth.SubnetMask= 0xC0FFFFFF
pDriverGlobals->eth.DHCPLeaseTime= 0x0
pDriverGlobals->eth.EdbgFlags= 0x1


OEMether IP Addr: 172.18.132.80


OEMether IP netmask: 255.255.255.192


(D)(OEMEthInit) SysIntrVal = EDBG_SYSINTR_NOINTR
(D) After OEMEthInit
Device XSBase25521862, IP 172.18.132.80, Port 981
(D) Before KitlEtherInit
Calling EdbgInitDHCP


(D) After KitlEtherInit
-OEMKitlInit
Host connected


Host IP: 172.18.132.91, port 1124


KeyIndex 0 = -1
KeyIndex 1 = -1
KeyIndex 2 = -1
KeyIndex 3 = -1
KeyIndex 4 = -1
KeyIndex 5 = -4194305
KeyIndex 6 = -4194305
KeyIndex 7 = -1
+KITLRegisterDfltClient, service:0
+KITLRegisterDfltClient, service:1
KITLGlobalState == 0x61
KITL Initialized
Waiting for service 'DBGMSG' to connect..., fUseSysCalls = 0
ProcessAdminMsg: Receive Config message for service DBGMSG
ProcessAdminMsg: Receive Config message for service PPSH
ProcessAdminMsg: Receive Config message for service DBGMSG
ProcessAdminMsg: Receive Config message for service DBGMSG
ProcessAdminMsg: Receive Config message for service PPSH
ProcessAdminMsg: Receive Config message for service DBGMSG
ARMInit done.
+KITLRegisterDfltClient, service:2
ProcessAdminMsg: Receive Config message for service KDBG
ProcessAdminMsg: Receive Config message for service KDBG
KITL: Leaving polling mode...
KITL Checking client registrations
+RegisterClientPart2: Id 0x00000000
KITL Timer thread started, (hTh: 0x07CB4FDE, pTh: 0x87C80000)
-RegisterClientPart2
+RegisterClientPart2: Id 0x00000001
-RegisterClientPart2


looking forward to your suggestions,I was a bit confused now..
thank u very much.

K
Thu Jun 05 12:12:43 PDT 2008

You may not eable the partition 1 of the SDRAM which is a common error here.
Because the initial code in fwxsc1.s will override the value of DE0/DE1,
modifying the value of MDCNFG_VAL dose not do the job properly but you will
need to enable the DE1 in your code.
You could refer the following thread for some details.
http://groups.google.com/group/microsoft.public.windowsce.platbuilder/browse_thread/thread/2f18becca1be2edd/8e85dd1e6dc4a07d

"blueYork" <yaoronger@tom.com> wrote in message
news:4daae181-b94f-4402-9420-4180cdae41c9@h1g2000prh.googlegroups.com...
> hi,everyone
> I am upgrading my sdram configuration for 128M,
> Frist of all,I show my platform,
> CPU : Xscale pxa255
> OS : Windows CE .Net 4.2
> Flash : 32MB
> SDRAM : 128MB (32MBX4)
> since I have heard that it only spend 2 hours on this issue,
> why it cost me more than one week to solve the problem...
>
> Okay,let's see the process.
> I modified some files related,
> config.bib,memdefs.h,memmap.inc,xsc1.h,xsc1.inc,xsc1bd.h,xsc1bd.inc,
> fwxsc1.s,platform.reg.(if i missed some file,pls tell me)
> At first,i always modified all of files related,
> then the kernel hung...I can not find where is the problem,
> so,I modified some files step by step,
> I just changed OEMAddressTable in memmap.inc,
> DCD 0x80000000, 0xA0000000, 64
> to
> DCD 0x80000000, 0xA0000000, 128
>
>
> and I also modified xsc1bd.inc,
> MDCNFG_VAL EQU 0x19C119C1; SDRAM Config Reg (CL=2)
> to
> MDCNFG_VAL EQU 0x19C319C3; SDRAM Config Reg (CL=2)
> then,sdram register MDCNFG enable the bank1 which is also 64MB.
> After two changes above,I download the kernel,it still works.
>
>
> Then,I just modified config.bib
>
>
> MEMORY
> IF IMGFLASH !
> NK 800B8000 02000000 RAMIMAGE ; SDRAM 32MB: [800B 8000 ->
> 820B
> 7FFF]
> RAM 820B8000 01C00000 RAM ; SDRAM 28MB: [820B 8000 ->
> 83CB
> 7FFF]
> EDBG 83F8D000 00020000 RESERVED ; x20000 for EBOOT - 3 Client
> memory pools of 24K (128K)
> ENDIF
> AUD_DMA 83CB8000 0000A000 RESERVED
> SLEEP_SAV 83CC2000 00001000 RESERVED
> DRV_GLB 83CC3000 00001000 RESERVED
> CACHE_FLG 83CC4000 0003C000 RESERVED ; for use by cache routines:
> 83CC_4000->83CC_4003 used for flagging. 83CC_4004->83CC_4803 rsvd for
> miniD
> DISPLAY 83D00000 00130000 RESERVED ; 1MB aligned
> BLOCK_BUF 83E30000 00080000 RESERVED
> UNUSED_BUF 83EB0000 000DD000 RESERVED
> whql_sig 00000001 00002000 EXTENSION ; WHQL signature extension
> (6KB).
> ZBANK 86000000 00100000 RESERVED
>
>
> to
>
>
> IF IMGFLASH !
> NK 800B8000 02000000 RAMIMAGE ; SDRAM 32MB
> RAM 820B8000 05C00000 RAM ; SDRAM 28MB+64MB
> EDBG 87F8D000 00020000 RESERVED ; x20000 for EBOOT - 3 Client
> memory pools of 24K (128K)
> ENDIF
> AUD_DMA 87CB8000 0000A000 RESERVED
> SLEEP_SAV 87CC2000 00001000 RESERVED
> DRV_GLB 87CC3000 00001000 RESERVED
> CACHE_FLG 87CC4000 0003C000 RESERVED ; for use by cache routines:
> 83CC_4000->83CC_4003 used for flagging. 83CC_4004->83CC_4803 rsvd for
> miniD
> DISPLAY 87D00000 00130000 RESERVED ; 1MB aligned
> BLOCK_BUF 87E30000 00080000 RESERVED
> UNUSED_BUF 87EB0000 000DD000 RESERVED
> whql_sig 00000001 00002000 EXTENSION ; WHQL signature extension
> (6KB).
> ZBANK 8A000000 00100000 RESERVED
>
>
> and also changed the other related addresses
> in memdefs.h,xsc1.h,xsc1.inc,xsc1bd.h,xsc1bd.inc.
> for instance:
> i modified
> #define MEM_BASE_PHYSICAL 0xA3CB8000
> #define MEM_BASE_C_VIRTUAL 0x83CB8000
> #define EDBG_PHYSICAL_MEMORY_START 0x83F8D000 // Ethernet
> Debugger
> Pool Address
> to
> #define MEM_BASE_PHYSICAL 0xA7CB8000
> #define MEM_BASE_C_VIRTUAL 0x87CB8000
> #define EDBG_PHYSICAL_MEMORY_START 0x87F8D000 // Ethernet
> Debugger
> Pool Address
> It seems that all the PHYSICAL address should not be modified,
> I try it before,but also do not work out..
> so at last,I made the above change.
>
>
> And during these days,I also tried to debug images,
> but it just hung as the release image..
> anyway,my system hung here:
> ****** Downloading operating system image for SDRAM target ******
>
>
> TFTP: Desktop losing ACK, block number = 54250, Ack again
> rom_offset=0x0.
> Found pTOC signature.
> ROMHDR at Address 800B8044h
> RomHdr.ulRAMStart=81C50000h RomHdr.physfirst=800B8000h.
> Done.
> Writing 0x80076BD8 to flash address 0xBC340000 (length=0xA40).
> Sector=0x200 (Length=0x6) Block=0x1 (Length=0x1).
> Handling non-block aligned data...
> FlashErase: Unlocking flash block(s) [0x1, 0x1] (please wait): Done.
> Erasing flash block(s) [0x1, 0x1] (please wait): .Done.
> Writing to flash (please wait): Done.
> Got EDBG_CMD_JUMPIMG
> Got EDBG_CMD_CONFIG, flags:0x00000000
> Download successful! Jumping to image at physical 0xA00B9000...
> Begin
> ******************************************************
> ******************************************************
> ******************************************************
> ******************************************************
> ******************************************************
> OEMInitDebugSerial using UART2
> Windows CE Kernel for ARM Built on Mar 13 2003 at 22:54:19
> ProcessorType=02d0 Revision=6
> sp_abt=ffff5000 sp_irq=ffff2800 sp_undef=ffffc800 OEMAddressTable =
> 800b9ef8
> Sp=ffffc7cc
> ///////////////////////////////////////
>
>
> and the debug kernel output here:
> normal 64M:
>
>
> Download successful! Jumping to image at physical 0xA00B9000...
> Begin
> ******************************************************
> ******************************************************
> ******************************************************
> ******************************************************
> ******************************************************
> OEMInitDebugSerial using UART2
> Windows CE Kernel for ARM Built on Mar 13 2003 at 22:43:27
> ProcessorType=02d0 Revision=6
> sp_abt=ffff5000 sp_irq=ffff2800 sp_undef=ffffc800 OEMAddressTable =
> 800b9ef4
> +OEMKitlInit
> (D) Before OEMEthInit
>
>
> (D)(OEMEthInit)
>
>
> Checking CS8900A Devices..
> CS8900A Ethernet Controller Already Initilaized: OK
> VBridgeInit()...TX = [16384] bytes -- Rx = [16384] bytes
>
>
> Tx buffer [0xA2D302E0] to [0xA2D342E0].
>
>
> [0xA2D2C2C0] to [0xA2D302C0].
>
>
> ridge:: NK add MAC: [0-B-29-FF-55-66]
>
>
> p Driver_Globals (ether stuff only) at : 0xA3CC3000
> pDriverGlobals->eth.EbootMagicNum= 0x45424F54
> pDriverGlobals->eth.etherEnabled= 0x0
> pDriverGlobals->eth.etherFlags= 0x0
> pDriverGlobals->eth.TargetAddr.dwIP= 0x508412AC
> pDriverGlobals->eth.TargetAddr.wMAC= 0xA3CC3910
> pDriverGlobals->eth.TargetAddr.wPort= 0xD403
> pDriverGlobals->eth.DownloadHostAddr.dwIP= 0x5B8412AC
> pDriverGlobals->eth.DownloadHostAddr.wMAC= 0xA3CC3920
> pDriverGlobals->eth.DownloadHostAddr.wPort= 0x1E04
> pDriverGlobals->eth.DbgHostAddr.dwIP= 0x0
> pDriverGlobals->eth.DbgHostAddr.wMAC= 0xA3CC392C
> pDriverGlobals->eth.DbgHostAddr.wPort= 0x0
> pDriverGlobals->eth.KdbgHostAddr.dwIP= 0x0
> pDriverGlobals->eth.KdbgHostAddr.wMAC= 0xA3CC3938
> pDriverGlobals->eth.KdbgHostAddr.wPort= 0x0
> pDriverGlobals->eth.PpshHostAddr.dwIP= 0x0
> pDriverGlobals->eth.PpshHostAddr.wMAC= 0xA3CC3944
> pDriverGlobals->eth.PpshHostAddr.wPort= 0x0
> pDriverGlobals->eth.SubnetMask= 0xC0FFFFFF
> pDriverGlobals->eth.DHCPLeaseTime= 0x0
> pDriverGlobals->eth.EdbgFlags= 0x1
>
>
> OEMether IP Addr: 172.18.132.80
>
>
> OEMether IP netmask: 255.255.255.192
>
>
> (D)(OEMEthInit) SysIntrVal = EDBG_SYSINTR_NOINTR
> (D) After OEMEthInit
> Device XSBase25521862, IP 172.18.132.80, Port 981
> (D) Before KitlEtherInit
> Calling EdbgInitDHCP
>
>
> (D) After KitlEtherInit
> -OEMKitlInit
> Host connected
>
>
> Host IP: 172.18.132.91, port 1050
>
>
> KeyIndex 0 = -1
> KeyIndex 1 = -1
> KeyIndex 2 = -1
> KeyIndex 3 = -1
> KeyIndex 4 = -1
> KeyIndex 5 = -1
> KeyIndex 6 = -1
> KeyIndex 7 = -1
> +KITLRegisterDfltClient, service:0
> +KITLRegisterDfltClient, service:1
> KITLGlobalState == 0x61
> KITL Initialized
> Waiting for service 'DBGMSG' to connect..., fUseSysCalls = 0
> ProcessAdminMsg: Receive Config message for service DBGMSG
> ProcessAdminMsg: Receive Config message for service PPSH
> ProcessAdminMsg: Receive Config message for service DBGMSG
> ProcessAdminMsg: Receive Config message for service PPSH
> ProcessAdminMsg: Receive Config message for service DBGMSG
> ARMInit done.
> +KITLRegisterDfltClient, service:2
> ProcessAdminMsg: Receive Config message for service KDBG
> ProcessAdminMsg: Receive Config message for service KDBG
> KITL: Leaving polling mode...
> KITL Checking client registrations
> +RegisterClientPart2: Id 0x00000000
> KITL Timer thread started, (hTh: 0x03CB4FDE, pTh: 0x83C80000)
> -RegisterClientPart2
> +RegisterClientPart2: Id 0x00000001
> -RegisterClientPart2
> VBridge:: VB_INITIALIZED returns [1]
>
>
> VBridgeInit()...TX = [16384] bytes -- Rx = [16384] bytes
>
>
> buffer [0xA2D302E0] to [0xA2D342E0].
>
>
> buffer [0xA2D2C2C0] to [0xA2D302C0].
>
>
> 0x83a645a8: TAPI:OldAddTapiDevice - This BSP is loading TSPs by old
> method!!! Change registry settings to use new way!!!
> OEMEthCurrentPacketFilter set to [0xB]
>
>
> VBridge:: Current VMini packet filter = [0xB]
>
>
> CS8900: Set receive packet filter [Filter=0xB, RxCTL=0xF05].
>
>
> OEMEthMulticastList():: No of Entries [1]
>
>
> [0] : 1 - 0 - 5E - 0 - 0 - 1
>
>
> OEMEthMulticastList returning [1]
>
>
> CS8900: Multicast[1 of 1] = 1-0-5E-0-0-1
>
>
> CS8900: Logical Address Filter = 40.0.0.0.
>
>
> ////////////////////////////////////////
> 128M hung:
> Download successful! Jumping to image at physical 0xA00B9000...
> Begin
> ******************************************************
> ******************************************************
> ******************************************************
> ******************************************************
> ******************************************************
> OEMInitDebugSerial using UART2
> Windows CE Kernel for ARM Built on Mar 13 2003 at 22:43:27
> ProcessorType=02d0 Revision=6
> sp_abt=ffff5000 sp_irq=ffff2800 sp_undef=ffffc800 OEMAddressTable =
> 800b9ef8
> +OEMKitlInit
> (D) Before OEMEthInit
>
>
> (D)(OEMEthInit)
>
>
> Checking CS8900A Devices..
> CS8900A Ethernet Controller Already Initilaized: OK
> VBridgeInit()...TX = [16384] bytes -- Rx = [16384] bytes
>
>
> buffer [0xA2D302E0] to [0xA2D342E0].
>
>
> buffer [0xA2D2C2C0] to [0xA2D302C0].
>
>
> NK add MAC: [0-B-29-FF-55-66]
>
>
> Dump Driver_Globals (ether stuff only) at : 0xA7CC3000
> pDriverGlobals->eth.EbootMagicNum= 0x45424F54
> pDriverGlobals->eth.etherEnabled= 0x0
> pDriverGlobals->eth.etherFlags= 0x0
> pDriverGlobals->eth.TargetAddr.dwIP= 0x508412AC
> pDriverGlobals->eth.TargetAddr.wMAC= 0xA7CC3910
> pDriverGlobals->eth.TargetAddr.wPort= 0xD403
> pDriverGlobals->eth.DownloadHostAddr.dwIP= 0x5B8412AC
> pDriverGlobals->eth.DownloadHostAddr.wMAC= 0xA7CC3920
> pDriverGlobals->eth.DownloadHostAddr.wPort= 0x6804
> pDriverGlobals->eth.DbgHostAddr.dwIP= 0x0
> pDriverGlobals->eth.DbgHostAddr.wMAC= 0xA7CC392C
> pDriverGlobals->eth.DbgHostAddr.wPort= 0x0
> pDriverGlobals->eth.KdbgHostAddr.dwIP= 0x0
> pDriverGlobals->eth.KdbgHostAddr.wMAC= 0xA7CC3938
> pDriverGlobals->eth.KdbgHostAddr.wPort= 0x0
> pDriverGlobals->eth.PpshHostAddr.dwIP= 0x0
> pDriverGlobals->eth.PpshHostAddr.wMAC= 0xA7CC3944
> pDriverGlobals->eth.PpshHostAddr.wPort= 0x0
> pDriverGlobals->eth.SubnetMask= 0xC0FFFFFF
> pDriverGlobals->eth.DHCPLeaseTime= 0x0
> pDriverGlobals->eth.EdbgFlags= 0x1
>
>
> OEMether IP Addr: 172.18.132.80
>
>
> OEMether IP netmask: 255.255.255.192
>
>
> (D)(OEMEthInit) SysIntrVal = EDBG_SYSINTR_NOINTR
> (D) After OEMEthInit
> Device XSBase25521862, IP 172.18.132.80, Port 981
> (D) Before KitlEtherInit
> Calling EdbgInitDHCP
>
>
> (D) After KitlEtherInit
> -OEMKitlInit
> Host connected
>
>
> Host IP: 172.18.132.91, port 1124
>
>
> KeyIndex 0 = -1
> KeyIndex 1 = -1
> KeyIndex 2 = -1
> KeyIndex 3 = -1
> KeyIndex 4 = -1
> KeyIndex 5 = -4194305
> KeyIndex 6 = -4194305
> KeyIndex 7 = -1
> +KITLRegisterDfltClient, service:0
> +KITLRegisterDfltClient, service:1
> KITLGlobalState == 0x61
> KITL Initialized
> Waiting for service 'DBGMSG' to connect..., fUseSysCalls = 0
> ProcessAdminMsg: Receive Config message for service DBGMSG
> ProcessAdminMsg: Receive Config message for service PPSH
> ProcessAdminMsg: Receive Config message for service DBGMSG
> ProcessAdminMsg: Receive Config message for service DBGMSG
> ProcessAdminMsg: Receive Config message for service PPSH
> ProcessAdminMsg: Receive Config message for service DBGMSG
> ARMInit done.
> +KITLRegisterDfltClient, service:2
> ProcessAdminMsg: Receive Config message for service KDBG
> ProcessAdminMsg: Receive Config message for service KDBG
> KITL: Leaving polling mode...
> KITL Checking client registrations
> +RegisterClientPart2: Id 0x00000000
> KITL Timer thread started, (hTh: 0x07CB4FDE, pTh: 0x87C80000)
> -RegisterClientPart2
> +RegisterClientPart2: Id 0x00000001
> -RegisterClientPart2
>
>
> looking forward to your suggestions,I was a bit confused now..
> thank u very much.
>
>

blueYork
Thu Jun 05 17:39:55 PDT 2008

thank u for your reply again,Mr huang.
I reminded of the post before,
besides adding the code
orr r3, r3, #MDCNFG_DE1
in fwxsc1.s,and I alse modified the sdram register
MDCNFG_VAL EQU 0x19C119C1; SDRAM Config Reg (CL=2)
to
MDCNFG_VAL EQU 0x19C319C3; SDRAM Config Reg (CL=2)
then,sdram register MDCNFG enable the bank1 which is also 64MB.

but as u said,I will modify the MDCNFG_VAL back,and see the result.
Thank u very much.

blueYork
Thu Jun 05 22:15:37 PDT 2008

since i modified the register MDCNFG_VAL back to 0x19C119C1 in
xsc1bd.inc,
and reflash the eboot and download kernel,
but it still hung ...
the output still below:
OEMInitDebugSerial using UART2
Windows CE Kernel for ARM Built on Mar 13 2003 at 22:54:19
ProcessorType=02d0 Revision=6
sp_abt=ffff5000 sp_irq=ffff2800 sp_undef=ffffc800 OEMAddressTable =
800b9ef8
Sp=ffffc7cc

/////////////////////
is there any changes on the top post that should not be done?

blueYork
Thu Jun 05 23:55:18 PDT 2008

well,I wanna list all my changes in files,
if there are any mistake,pls indicate.
(1)fwxsc1.s
modify
orr r3, r3, #MDCNFG_DE0
to
orr r3, r3, #MDCNFG_DE0
orr r3, r3, #MDCNFG_DE1
(2)memmap.inc
modified
OEMAddressTable
DCD SDRAM_BASE_C_VIRTUAL, SDRAM_BASE_PHYSICAL, 64
DCD ZBANK_BASE_C_VIRTUAL, ZBANK_BASE_PHYSICAL, 1 ; (8600 0000, E000
0000)
DCD MEMC_BASE_C_VIRTUAL, MEMC_BASE_PHYSICAL, 1 ; (8610 0000, 4800
0000) Memory Controller
DCD PERIF_BASE_C_VIRTUAL, PERIF_BASE_PHYSICAL, 2 ; (8620 0000, 4000
0000) Mem-Mapped Registers (perifs)
DCD PCMCIA_S0_IO_C_VIRTUAL, PCMCIA_S0_IO_PHYSICAL, 32 ; (8820 0000,
2000 0000)
DCD PCMCIA_S0_ATTR_C_VIRTUAL,PCMCIA_S0_ATTR_PHYSICAL, 32 ; (8A20 0000,
2800 0000)
DCD PCMCIA_S0_CMN_C_VIRTUAL, PCMCIA_S0_CMN_PHYSICAL, 64 ; (8C20 0000,
2C00 0000)
DCD PCMCIA_S1_IO_C_VIRTUAL, PCMCIA_S1_IO_PHYSICAL, 32; (9020 0000,
3000 0000)
DCD PCMCIA_S1_ATTR_C_VIRTUAL,PCMCIA_S1_ATTR_PHYSICAL, 32 ; (9220 0000,
3800 0000)
DCD PCMCIA_S1_CMN_C_VIRTUAL, PCMCIA_S1_CMN_PHYSICAL, 64 ; (9420 0000,
3C00 0000)
DCD LCD_BASE_C_VIRTUAL, LCD_BASE_PHYSICAL,1 ; (9820 0000, 4400 0000)
LCDC
DCD BOOT_FLASH_BASE_C_VIRTUAL, BOOT_FLASH_BASE_PHYSICAL, 32 ; (9830
0000, 0000 0000) BOOT ROM (nCS0)
DCD CS8900A_BASE_C_VIRTUAL, CS8900A_BASE_PHYSICAL, 1 ; (9C30 0000,
0400 0000) CS8900A (nCS1)
DCD XHYPER255B_PERI_C_VIRTUAL, XHYPER255B_PERI_PHYSICAL,5 ; (9C40
0000, 0800 0000) Peripherals(nCS2)
DCD CY7C67300_BASE_C_VIRTUAL,CY7C67300_BASE_PHYSICAL, 1 ; (9C90 0000,
0C70 0000) CY7C67300 (nCS3)
DCD nCS4_BASE_C_VIRTUAL,nCS4_BASE_PHYSICAL, 8 ; (9CA0 0000, 1000 0000)
(nCS4)
DCD nCS5_BASE_C_VIRTUAL,nCS5_BASE_PHYSICAL, 8; (9D20 0000, 1400 0000)
(nCS5)
DCD 0x00000000, 0x00000000, 0
END

to
OEMAddressTable
DCD SDRAM_BASE_C_VIRTUAL, SDRAM_BASE_PHYSICAL, 128
DCD ZBANK_BASE_C_VIRTUAL, ZBANK_BASE_PHYSICAL, 1 ; (8A00 0000, E000
0000)
DCD MEMC_BASE_C_VIRTUAL, MEMC_BASE_PHYSICAL, 1 ; (8A10 0000, 4800
0000) Memory Controller
DCD PERIF_BASE_C_VIRTUAL, PERIF_BASE_PHYSICAL, 32 ; (8A20 0000, 4000
0000) Mem-Mapped Registers (perifs)
DCD PCMCIA_S0_IO_C_VIRTUAL, PCMCIA_S0_IO_PHYSICAL, 32 ; (8C20 0000,
2000 0000)
DCD PCMCIA_S0_ATTR_C_VIRTUAL,PCMCIA_S0_ATTR_PHYSICAL, 32 ; (8E20 0000,
2800 0000)
DCD PCMCIA_S0_CMN_C_VIRTUAL, PCMCIA_S0_CMN_PHYSICAL, 64 ; (9020 0000,
2C00 0000)
DCD PCMCIA_S1_IO_C_VIRTUAL, PCMCIA_S1_IO_PHYSICAL, 32; (9420 0000,
3000 0000)
DCD PCMCIA_S1_ATTR_C_VIRTUAL,PCMCIA_S1_ATTR_PHYSICAL, 32 ; (9620 0000,
3800 0000)
DCD PCMCIA_S1_CMN_C_VIRTUAL, PCMCIA_S1_CMN_PHYSICAL, 64 ; (9820 0000,
3C00 0000)
DCD LCD_BASE_C_VIRTUAL, LCD_BASE_PHYSICAL,1 ; (9C20 0000, 4400 0000)
LCDC
DCD BOOT_FLASH_BASE_C_VIRTUAL, BOOT_FLASH_BASE_PHYSICAL, 32 ; (9C30
0000, 0000 0000) BOOT ROM (nCS0)
DCD CS8900A_BASE_C_VIRTUAL, CS8900A_BASE_PHYSICAL, 1 ; (9E30 0000,
0400 0000) CS8900A (nCS1)
DCD XHYPER255B_PERI_C_VIRTUAL, XHYPER255B_PERI_PHYSICAL,5 ; (9E40
0000, 0800 0000) Peripherals(nCS2)
DCD CY7C67300_BASE_C_VIRTUAL,CY7C67300_BASE_PHYSICAL, 1 ; (9E90 0000,
0C70 0000) CY7C67300 (nCS3)
DCD nCS4_BASE_C_VIRTUAL,nCS4_BASE_PHYSICAL, 8 ; (9EA0 0000, 1000 0000)
(nCS4)
DCD nCS5_BASE_C_VIRTUAL,nCS5_BASE_PHYSICAL, 8; (9F20 0000, 1400 0000)
(nCS5)
DCD 0x00000000, 0x00000000, 0
END
(3)config.bib
modified
MEMORY
IF IMGFLASH !
NK 800B8000 02000000 RAMIMAGE ; SDRAM 32MB: [800B 8000 ->
820B
7FFF]
RAM 820B8000 01C00000 RAM ; SDRAM 28MB: [820B 8000 ->
83CB
7FFF]
EDBG 83F8D000 00020000 RESERVED ; x20000 for EBOOT - 3 Client
memory pools of 24K (128K)
ENDIF
AUD_DMA 83CB8000 0000A000 RESERVED
SLEEP_SAV 83CC2000 00001000 RESERVED
DRV_GLB 83CC3000 00001000 RESERVED
CACHE_FLG 83CC4000 0003C000 RESERVED ; for use by cache routines:
83CC_4000->83CC_4003 used for flagging. 83CC_4004->83CC_4803 rsvd for
miniD
DISPLAY 83D00000 00130000 RESERVED ; 1MB aligned
BLOCK_BUF 83E30000 00080000 RESERVED
UNUSED_BUF 83EB0000 000DD000 RESERVED
whql_sig 00000001 00002000 EXTENSION ; WHQL signature extension
(6KB).
ZBANK 86000000 00100000 RESERVED


to


IF IMGFLASH !
NK 800B8000 02000000 RAMIMAGE ; SDRAM 32MB
RAM 820B8000 05C00000 RAM ; SDRAM 28MB+64MB
EDBG 87F8D000 00020000 RESERVED ; x20000 for EBOOT - 3 Client
memory pools of 24K (128K)
ENDIF
AUD_DMA 87CB8000 0000A000 RESERVED
SLEEP_SAV 87CC2000 00001000 RESERVED
DRV_GLB 87CC3000 00001000 RESERVED
CACHE_FLG 87CC4000 0003C000 RESERVED ; for use by cache routines:
83CC_4000->83CC_4003 used for flagging. 83CC_4004->83CC_4803 rsvd for
miniD
DISPLAY 87D00000 00130000 RESERVED ; 1MB aligned
BLOCK_BUF 87E30000 00080000 RESERVED
UNUSED_BUF 87EB0000 000DD000 RESERVED
whql_sig 00000001 00002000 EXTENSION ; WHQL signature extension
(6KB).
ZBANK 8A000000 00100000 RESERVED

blueYork
Fri Jun 06 00:22:23 PDT 2008

(4)memdefs.h
modified

#define MEM_BASE_PHYSICAL 0xA3CB8000
#define MEM_BASE_C_VIRTUAL 0x83CB8000
#define EDBG_PHYSICAL_MEMORY_START 0x83F8D000 // Ethernet Debugger
Pool Address
......
to

#define MEM_BASE_PHYSICAL 0xA3CB8000
#define MEM_BASE_C_VIRTUAL 0x87CB8000
#define EDBG_PHYSICAL_MEMORY_START 0x87F8D000 // Ethernet Debugger
Pool Address

(5)xsc1.h
modified

#define PCMCIA_S0_IO_PHYSICAL 0x20000000
#define PCMCIA_S0_IO_C_VIRTUAL 0x88200000// cached & buffered virtual
#define PCMCIA_S0_IO_U_VIRTUAL (PCMCIA_S0_IO_C_VIRTUAL
+CACHED_TO_UNCACHED_OFFSET)

#define PCMCIA_S0_ATTR_PHYSICAL 0x28000000
#define PCMCIA_S0_ATTR_C_VIRTUAL 0x8A200000
#define PCMCIA_S0_ATTR_U_VIRTUAL (PCMCIA_S0_ATTR_C_VIRTUAL
+CACHED_TO_UNCACHED_OFFSET)

#define PCMCIA_S0_CMN_PHYSICAL 0x2C000000
#define PCMCIA_S0_CMN_C_VIRTUAL 0x8C200000
#define PCMCIA_S0_CMN_U_VIRTUAL (PCMCIA_S0_CMN_C_VIRTUAL
+CACHED_TO_UNCACHED_OFFSET)

#define PCMCIA_S1_IO_PHYSICAL 0x30000000
#define PCMCIA_S1_IO_C_VIRTUAL 0x90200000
#define PCMCIA_S1_IO_U_VIRTUAL (PCMCIA_S1_IO_C_VIRTUAL
+CACHED_TO_UNCACHED_OFFSET)

#define PCMCIA_S1_ATTR_PHYSICAL 0x38000000
#define PCMCIA_S1_ATTR_C_VIRTUAL 0x92200000
#define PCMCIA_S1_ATTR_U_VIRTUAL (PCMCIA_S1_ATTR_C_VIRTUAL
+CACHED_TO_UNCACHED_OFFSET)

#define PCMCIA_S1_CMN_PHYSICAL 0x3C000000
#define PCMCIA_S1_CMN_C_VIRTUAL 0x94200000
#define PCMCIA_S1_CMN_U_VIRTUAL (PCMCIA_S1_CMN_C_VIRTUAL
+CACHED_TO_UNCACHED_OFFSET)
//
// MEMORY-MAPPED REGISTERS (perifs)
//
#define PERIF_BASE_PHYSICAL 0x40000000
#define PERIF_BASE_C_VIRTUAL 0x86200000
#define PERIF_BASE_U_VIRTUAL (PERIF_BASE_C_VIRTUAL
+CACHED_TO_UNCACHED_OFFSET)
//
// MEMORY-MAPPED REGISTERS (LCD)
//
#define LCD_BASE_PHYSICAL 0x44000000
#define LCD_BASE_C_VIRTUAL 0x98200000
#define LCD_BASE_U_VIRTUAL (LCD_BASE_C_VIRTUAL +
CACHED_TO_UNCACHED_OFFSET)
//
// MEMORY-MAPPED REGISTERS (MEMC)
//
#define MEMC_BASE_PHYSICAL 0x48000000
#define MEMC_BASE_C_VIRTUAL 0x86100000
#define MEMC_BASE_U_VIRTUAL (MEMC_BASE_C_VIRTUAL
+CACHED_TO_UNCACHED_OFFSET)

#define ZBANK_BASE_PHYSICAL 0xE0000000
#define ZBANK_BASE_C_VIRTUAL 0x86000000
#define ZBANK_BASE_U_VIRTUAL (ZBANK_BASE_C_VIRTUAL +
CACHED_TO_UNCACHED_OFFSET)

to

#define PCMCIA_S0_IO_PHYSICAL 0x20000000
#define PCMCIA_S0_IO_C_VIRTUAL 0x8C200000// cached & buffered virtual
#define PCMCIA_S0_IO_U_VIRTUAL (PCMCIA_S0_IO_C_VIRTUAL
+CACHED_TO_UNCACHED_OFFSET)

#define PCMCIA_S0_ATTR_PHYSICAL 0x28000000
#define PCMCIA_S0_ATTR_C_VIRTUAL 0x8E200000
#define PCMCIA_S0_ATTR_U_VIRTUAL (PCMCIA_S0_ATTR_C_VIRTUAL
+CACHED_TO_UNCACHED_OFFSET)

#define PCMCIA_S0_CMN_PHYSICAL 0x2C000000
#define PCMCIA_S0_CMN_C_VIRTUAL 0x90200000
#define PCMCIA_S0_CMN_U_VIRTUAL (PCMCIA_S0_CMN_C_VIRTUAL
+CACHED_TO_UNCACHED_OFFSET)

#define PCMCIA_S1_IO_PHYSICAL 0x30000000
#define PCMCIA_S1_IO_C_VIRTUAL 0x94200000
#define PCMCIA_S1_IO_U_VIRTUAL (PCMCIA_S1_IO_C_VIRTUAL
+CACHED_TO_UNCACHED_OFFSET)

#define PCMCIA_S1_ATTR_PHYSICAL 0x38000000
#define PCMCIA_S1_ATTR_C_VIRTUAL 0x96200000
#define PCMCIA_S1_ATTR_U_VIRTUAL (PCMCIA_S1_ATTR_C_VIRTUAL
+CACHED_TO_UNCACHED_OFFSET)

#define PCMCIA_S1_CMN_PHYSICAL 0x3C000000
#define PCMCIA_S1_CMN_C_VIRTUAL 0x98200000
#define PCMCIA_S1_CMN_U_VIRTUAL (PCMCIA_S1_CMN_C_VIRTUAL
+CACHED_TO_UNCACHED_OFFSET)
//
// MEMORY-MAPPED REGISTERS (perifs)
//
#define PERIF_BASE_PHYSICAL 0x40000000
#define PERIF_BASE_C_VIRTUAL 0x8A200000
#define PERIF_BASE_U_VIRTUAL (PERIF_BASE_C_VIRTUAL
+CACHED_TO_UNCACHED_OFFSET)
//
// MEMORY-MAPPED REGISTERS (LCD)
//
#define LCD_BASE_PHYSICAL 0x44000000
#define LCD_BASE_C_VIRTUAL 0x9C200000
#define LCD_BASE_U_VIRTUAL (LCD_BASE_C_VIRTUAL +
CACHED_TO_UNCACHED_OFFSET)
//
// MEMORY-MAPPED REGISTERS (MEMC)
//
#define MEMC_BASE_PHYSICAL 0x48000000
#define MEMC_BASE_C_VIRTUAL 0x8A100000
#define MEMC_BASE_U_VIRTUAL (MEMC_BASE_C_VIRTUAL
+CACHED_TO_UNCACHED_OFFSET)


#define ZBANK_BASE_PHYSICAL 0xE0000000
#define ZBANK_BASE_C_VIRTUAL 0x8A000000
#define ZBANK_BASE_U_VIRTUAL (ZBANK_BASE_C_VIRTUAL +
CACHED_TO_UNCACHED_OFFSET)

(6)xsc1.inc
modified

ZBANK_BASE_PHYSICAL EQU 0xE0000000
ZBANK_BASE_C_VIRTUAL EQU 0x86000000 ; cached virtual
ZBANK_BASE_U_VIRTUAL EQU (ZBANK_BASE_C_VIRTUAL +
xscCACHED_TO_UNCACHED_OFFSET)
; /* MEMORY-MAPPED REGISTERS (MEMC) */
MEMC_BASE_PHYSICAL EQU 0x48000000
MEMC_BASE_C_VIRTUAL EQU 0x86100000 ; cached virtual
MEMC_BASE_U_VIRTUAL EQU (MEMC_BASE_C_VIRTUAL
+xscCACHED_TO_UNCACHED_OFFSET)
............
; /* MEMORY-MAPPED REGISTERS (perifs) */
PERIF_BASE_PHYSICAL EQU 0x40000000
PERIF_BASE_C_VIRTUAL EQU 0x86200000 ; cached virtual
PERIF_BASE_U_VIRTUAL EQU (PERIF_BASE_C_VIRTUAL
+xscCACHED_TO_UNCACHED_OFFSET)
; /* PCMCIA Slots 0,1 */
PCMCIA_S0_IO_PHYSICAL EQU 0x20000000
PCMCIA_S0_IO_C_VIRTUAL EQU 0x88200000 ; cached virtual
PCMCIA_S0_IO_U_VIRTUAL EQU (PCMCIA_S0_IO_C_VIRTUAL
+xscCACHED_TO_UNCACHED_OFFSET)

PCMCIA_S0_ATTR_PHYSICAL EQU 0x28000000
PCMCIA_S0_ATTR_C_VIRTUAL EQU 0x8A200000 ; cached virtual
PCMCIA_S0_ATTR_U_VIRTUAL EQU (PCMCIA_S0_ATTR_C_VIRTUAL
+xscCACHED_TO_UNCACHED_OFFSET)

PCMCIA_S0_CMN_PHYSICAL EQU 0x2C000000
PCMCIA_S0_CMN_C_VIRTUAL EQU 0x8C200000 ; cached virtual
PCMCIA_S0_CMN_U_VIRTUAL EQU (PCMCIA_S0_CMN_C_VIRTUAL
+xscCACHED_TO_UNCACHED_OFFSET)

PCMCIA_S1_IO_PHYSICAL EQU 0x30000000
PCMCIA_S1_IO_C_VIRTUAL EQU 0x90200000 ; cached virtual
PCMCIA_S1_IO_U_VIRTUAL EQU (PCMCIA_S1_IO_C_VIRTUAL
+xscCACHED_TO_UNCACHED_OFFSET)

PCMCIA_S1_ATTR_PHYSICAL EQU 0x38000000
PCMCIA_S1_ATTR_C_VIRTUAL EQU 0x92200000 ; cached virtual
PCMCIA_S1_ATTR_U_VIRTUAL EQU (PCMCIA_S1_ATTR_C_VIRTUAL
+xscCACHED_TO_UNCACHED_OFFSET)

PCMCIA_S1_CMN_PHYSICAL EQU 0x3C000000
PCMCIA_S1_CMN_C_VIRTUAL EQU 0x94200000 ; cached virtual
PCMCIA_S1_CMN_U_VIRTUAL EQU (PCMCIA_S1_CMN_C_VIRTUAL
+xscCACHED_TO_UNCACHED_OFFSET)

; /* MEMORY-MAPPED REGISTERS (LCD) */
LCD_BASE_PHYSICAL EQU 0x44000000
LCD_BASE_C_VIRTUAL EQU 0x98200000
LCD_BASE_U_VIRTUAL EQU (LCD_BASE_C_VIRTUAL +
xscCACHED_TO_UNCACHED_OFFSET)
..............
IF PLAT_SANDGATE = "1"
IF SABINAL = "1"
SLEEPDATA_BASE_VIRTUAL EQU 0x81DC7000 ; keep in sync w/
config.bib
SLEEPDATA_BASE_PHYSICAL EQU 0xA1DC7000 ;
ELSE
SLEEPDATA_BASE_VIRTUAL EQU 0x83DC7000 ; keep in sync w/
config.bib
SLEEPDATA_BASE_PHYSICAL EQU 0xA3DC7000 ;
ENDIF
ENDIF ; PLAT_SANDGATE = "1"
IF PLAT_LUBBOCK = "1"
IF SABINAL = "1"
SLEEPDATA_BASE_VIRTUAL EQU 0x81CC2000 ; keep in sync w/
config.bib
SLEEPDATA_BASE_PHYSICAL EQU 0xA1CC2000 ;
ELSE
;
; These are for the new alignment and larger eboot image size
;
SLEEPDATA_BASE_VIRTUAL EQU 0x83CC2000 ; keep in sync w/
config.bib
SLEEPDATA_BASE_PHYSICAL EQU 0xA3CC2000 ;
ENDIF
ENDIF ; PLAT_LUBBOCK = "1"


to


ZBANK_BASE_PHYSICAL EQU 0xE0000000
ZBANK_BASE_C_VIRTUAL EQU 0x8A000000 ; cached virtual
ZBANK_BASE_U_VIRTUAL EQU (ZBANK_BASE_C_VIRTUAL +
xscCACHED_TO_UNCACHED_OFFSET)
; /* MEMORY-MAPPED REGISTERS (MEMC) */
MEMC_BASE_PHYSICAL EQU 0x48000000
MEMC_BASE_C_VIRTUAL EQU 0x8A100000 ; cached virtual
MEMC_BASE_U_VIRTUAL EQU (MEMC_BASE_C_VIRTUAL
+xscCACHED_TO_UNCACHED_OFFSET)
............
; /* MEMORY-MAPPED REGISTERS (perifs) */
PERIF_BASE_PHYSICAL EQU 0x40000000
PERIF_BASE_C_VIRTUAL EQU 0x8A200000 ; cached virtual
PERIF_BASE_U_VIRTUAL EQU (PERIF_BASE_C_VIRTUAL
+xscCACHED_TO_UNCACHED_OFFSET)

; /* PCMCIA Slots 0,1 */
PCMCIA_S0_IO_PHYSICAL EQU 0x20000000
PCMCIA_S0_IO_C_VIRTUAL EQU 0x8C200000 ; cached virtual
PCMCIA_S0_IO_U_VIRTUAL EQU (PCMCIA_S0_IO_C_VIRTUAL
+xscCACHED_TO_UNCACHED_OFFSET)

PCMCIA_S0_ATTR_PHYSICAL EQU 0x28000000
PCMCIA_S0_ATTR_C_VIRTUAL EQU 0x8E200000 ; cached virtual
PCMCIA_S0_ATTR_U_VIRTUAL EQU (PCMCIA_S0_ATTR_C_VIRTUAL
+xscCACHED_TO_UNCACHED_OFFSET)

PCMCIA_S0_CMN_PHYSICAL EQU 0x2C000000
PCMCIA_S0_CMN_C_VIRTUAL EQU 0x90200000 ; cached virtual
PCMCIA_S0_CMN_U_VIRTUAL EQU (PCMCIA_S0_CMN_C_VIRTUAL
+xscCACHED_TO_UNCACHED_OFFSET)

PCMCIA_S1_IO_PHYSICAL EQU 0x30000000
PCMCIA_S1_IO_C_VIRTUAL EQU 0x94200000 ; cached virtual
PCMCIA_S1_IO_U_VIRTUAL EQU (PCMCIA_S1_IO_C_VIRTUAL
+xscCACHED_TO_UNCACHED_OFFSET)

PCMCIA_S1_ATTR_PHYSICAL EQU 0x38000000
PCMCIA_S1_ATTR_C_VIRTUAL EQU 0x96200000 ; cached virtual
PCMCIA_S1_ATTR_U_VIRTUAL EQU (PCMCIA_S1_ATTR_C_VIRTUAL
+xscCACHED_TO_UNCACHED_OFFSET)

PCMCIA_S1_CMN_PHYSICAL EQU 0x3C000000
PCMCIA_S1_CMN_C_VIRTUAL EQU 0x98200000 ; cached virtual
PCMCIA_S1_CMN_U_VIRTUAL EQU (PCMCIA_S1_CMN_C_VIRTUAL
+xscCACHED_TO_UNCACHED_OFFSET)

; /* MEMORY-MAPPED REGISTERS (LCD) */
LCD_BASE_PHYSICAL EQU 0x44000000
LCD_BASE_C_VIRTUAL EQU 0x9C200000
LCD_BASE_U_VIRTUAL EQU (LCD_BASE_C_VIRTUAL +
xscCACHED_TO_UNCACHED_OFFSET)
................
IF PLAT_SANDGATE = "1"
IF SABINAL = "1"
SLEEPDATA_BASE_VIRTUAL EQU 0x85DC7000 ; keep in sync w/
config.bib
SLEEPDATA_BASE_PHYSICAL EQU 0xA1DC7000 ;
ELSE
SLEEPDATA_BASE_VIRTUAL EQU 0x87DC7000 ; keep in sync w/
config.bib
SLEEPDATA_BASE_PHYSICAL EQU 0xA3DC7000 ;
ENDIF
ENDIF ; PLAT_SANDGATE = "1"
IF PLAT_LUBBOCK = "1"
IF SABINAL = "1"
SLEEPDATA_BASE_VIRTUAL EQU 0x85CC2000 ; keep in sync w/
config.bib
SLEEPDATA_BASE_PHYSICAL EQU 0xA1CC2000 ;
ELSE
;
; These are for the new alignment and larger eboot image size
;
SLEEPDATA_BASE_VIRTUAL EQU 0x87CC2000 ; keep in sync w/
config.bib
SLEEPDATA_BASE_PHYSICAL EQU 0xA3CC2000 ;
ENDIF
ENDIF ; PLAT_LUBBOCK = "1"

blueYork
Fri Jun 06 00:43:05 PDT 2008

(7)xsc1bd.h
modified

#define BOOT_FLASH_BASE_PHYSICAL 0x00000000
#define BOOT_FLASH_BASE_C_VIRTUAL 0x98300000
#define BOOT_FLASH_BASE_U_VIRTUAL (BOOT_FLASH_BASE_C_VIRTUAL +
CACHED_TO_UNCACHED_OFFSET)
..........
#define CS8900A_BASE_PHYSICAL 0x04000000
#define CS8900A_BASE_C_VIRTUAL 0x9C300000
#define CS8900A_BASE_U_VIRTUAL (CS8900A_BASE_C_VIRTUAL +
CACHED_TO_UNCACHED_OFFSET)
//
// XHYPER255B: Peripherals(LED, PushButton, PCMCIA/CF, ...)(4MB) ->
nCS2
//
#define XHYPER255B_PERI_BASE_PHYSICAL 0x08000000
#define XHYPER255B_PERI_BASE_C_VIRTUAL 0x9C400000
#define XHYPER255B_PERI_BASE_U_VIRTUAL
(XHYPER255B_PERI_BASE_C_VIRTUAL + CACHED_TO_UNCACHED_OFFSET)
............
#define CY7C67300_BASE_PHYSICAL 0x0C700000//modify by RenLiang
04/27/2007
#define CY7C67300_BASE_C_VIRTUAL 0x9C900000
#define CY7C67300_BASE_U_VIRTUAL (CY7C67300_BASE_C_VIRTUAL+
CACHED_TO_UNCACHED_OFFSET)
#define nCS4_BASE_PHYSICAL 0x10000000
#define nCS4_BASE_C_VIRTUAL 0x9CA00000
#define nCS4_BASE_U_VIRTUAL (nCS4_BASE_C_VIRTUAL +
lCACHED_TO_UNCACHED_OFFSET)


to


#define BOOT_FLASH_BASE_PHYSICAL 0x00000000
#define BOOT_FLASH_BASE_C_VIRTUAL 0x9C300000
#define BOOT_FLASH_BASE_U_VIRTUAL (BOOT_FLASH_BASE_C_VIRTUAL +
CACHED_TO_UNCACHED_OFFSET)
#define CS8900A_BASE_PHYSICAL 0x04000000
#define CS8900A_BASE_C_VIRTUAL 0x9E300000
#define CS8900A_BASE_U_VIRTUAL (CS8900A_BASE_C_VIRTUAL +
CACHED_TO_UNCACHED_OFFSET)
//
// XHYPER255B: Peripherals(LED, PushButton, PCMCIA/CF, ...)(4MB) ->
nCS2
//
#define XHYPER255B_PERI_BASE_PHYSICAL 0x08000000
#define XHYPER255B_PERI_BASE_C_VIRTUAL 0x9E400000
#define XHYPER255B_PERI_BASE_U_VIRTUAL
(XHYPER255B_PERI_BASE_C_VIRTUAL + CACHED_TO_UNCACHED_OFFSET)

#define CY7C67300_BASE_PHYSICAL 0x0C700000//modify by RenLiang
04/27/2007
#define CY7C67300_BASE_C_VIRTUAL 0x9E900000
#define CY7C67300_BASE_U_VIRTUAL (CY7C67300_BASE_C_VIRTUAL+
CACHED_TO_UNCACHED_OFFSET
#define nCS4_BASE_PHYSICAL 0x10000000
#define nCS4_BASE_C_VIRTUAL 0x9EA00000
#define nCS4_BASE_U_VIRTUAL (nCS4_BASE_C_VIRTUAL +
CACHED_TO_UNCACHED_OFFSET)
//nCS5 Address
#define nCS5_BASE_PHYSICAL 0x14000000
#define nCS5_BASE_C_VIRTUAL 0x9F200000
#define nCS5_BASE_U_VIRTUAL (nCS5_BASE_C_VIRTUAL +
CACHED_TO_UNCACHED_OFFSET)

(8)xsc1bd.inc
modified

BOOT_FLASH_BASE_PHYSICAL EQU 0x00000000
BOOT_FLASH_BASE_C_VIRTUAL EQU 0x98300000
BOOT_FLASH_BASE_U_VIRTUAL EQU (BOOT_FLASH_BASE_C_VIRTUAL +
lCACHED_TO_UNCACHED_OFFSET)
...........
; CS8900A: nCS1 -> 1MB
CS8900A_BASE_PHYSICAL EQU 0x04000000
CS8900A_BASE_C_VIRTUAL EQU 0x9C300000
CS8900A_BASE_U_VIRTUAL EQU (CS8900A_BASE_C_VIRTUAL +
lCACHED_TO_UNCACHED_OFFSET)

; XHYPER255B Peripherals : nCS2 -> 4MB
XHYPER255B_PERI_PHYSICAL EQU 0x08000000
XHYPER255B_PERI_C_VIRTUAL EQU 0x9C400000
XHYPER255B_PERI_U_VIRTUAL EQU (XHYPER255B_PERI_C_VIRTUAL +
lCACHED_TO_UNCACHED_OFFSET)

; DEBUG LED..
XHYPER255B_LED_PHYSICAL EQU 0x08300000
XHYPER255B_LED_C_VIRTUAL EQU 0x9C700000
XHYPER255B_LED_U_VIRTUAL EQU (XHYPER255B_LED_C_VIRTUAL +
lCACHED_TO_UNCACHED_OFFSET)
CY7C67300_BASE_PHYSICAL EQU 0x0C700000
CY7C67300_BASE_C_VIRTUAL EQU 0x9C900000
CY7C67300_BASE_U_VIRTUAL EQU (CY7C67300_BASE_C_VIRTUAL +
lCACHED_TO_UNCACHED_OFFSET)
nCS4_BASE_PHYSICAL EQU 0x10000000
nCS4_BASE_C_VIRTUAL EQU 0x9CA00000
nCS4_BASE_U_VIRTUAL EQU (nCS4_BASE_C_VIRTUAL +
lCACHED_TO_UNCACHED_OFFSET)

;nCS5 Address
nCS5_BASE_PHYSICAL EQU 0x14000000
nCS5_BASE_C_VIRTUAL EQU 0x9D200000
nCS5_BASE_U_VIRTUAL EQU (nCS5_BASE_C_VIRTUAL +
lCACHED_TO_UNCACHED_OFFSET)

to


BOOT_FLASH_BASE_PHYSICAL EQU 0x00000000
BOOT_FLASH_BASE_C_VIRTUAL EQU 0x9C300000
BOOT_FLASH_BASE_U_VIRTUAL EQU (BOOT_FLASH_BASE_C_VIRTUAL +
lCACHED_TO_UNCACHED_OFFSET)
.........
; CS8900A: nCS1 -> 1MB
CS8900A_BASE_PHYSICAL EQU 0x04000000
CS8900A_BASE_C_VIRTUAL EQU 0x9E300000
CS8900A_BASE_U_VIRTUAL EQU (CS8900A_BASE_C_VIRTUAL +
lCACHED_TO_UNCACHED_OFFSET)

; XHYPER255B Peripherals : nCS2 -> 4MB
XHYPER255B_PERI_PHYSICAL EQU 0x08000000
XHYPER255B_PERI_C_VIRTUAL EQU 0x9E400000
XHYPER255B_PERI_U_VIRTUAL EQU (XHYPER255B_PERI_C_VIRTUAL +
lCACHED_TO_UNCACHED_OFFSET)

; DEBUG LED..
XHYPER255B_LED_PHYSICAL EQU 0x08300000
XHYPER255B_LED_C_VIRTUAL EQU 0x9E700000
XHYPER255B_LED_U_VIRTUAL EQU (XHYPER255B_LED_C_VIRTUAL +
lCACHED_TO_UNCACHED_OFFSET)

; USB HOST
CY7C67300_BASE_PHYSICAL EQU 0x0C700000
CY7C67300_BASE_C_VIRTUAL EQU 0x9E900000
CY7C67300_BASE_U_VIRTUAL EQU (CY7C67300_BASE_C_VIRTUAL +
lCACHED_TO_UNCACHED_OFFSET)
nCS4_BASE_PHYSICAL EQU 0x10000000
nCS4_BASE_C_VIRTUAL EQU 0x9EA00000
nCS4_BASE_U_VIRTUAL EQU (nCS4_BASE_C_VIRTUAL +
lCACHED_TO_UNCACHED_OFFSET)

;nCS5 Address
nCS5_BASE_PHYSICAL EQU 0x14000000
nCS5_BASE_C_VIRTUAL EQU 0x9F200000
nCS5_BASE_U_VIRTUAL EQU (nCS5_BASE_C_VIRTUAL +
lCACHED_TO_UNCACHED_OFFSET)

(9)platform.reg
modified

;-------------------------------------------------------------
; Serial1 : FFUART
;-------------------------------------------------------------
"IoBase"=dword:a6300000

;-------------------------------------------------------------
; Serial4 : STUART
;-------------------------------------------------------------
"IoBase"=dword:a6900000

;-------------------------------------------------------------
; CS8900
;-------------------------------------------------------------
"IoBaseAddress"=dword:BC300300


to


;-------------------------------------------------------------
; Serial1 : FFUART
;-------------------------------------------------------------
"IoBase"=dword:aa300000 ;FFUART_BASE_U_VIRTUAL

;-------------------------------------------------------------
; Serial4 : STUART
;-------------------------------------------------------------
"IoBase"=dword:aa900000 ;STUART_BASE_U_VIRTUAL


;-------------------------------------------------------------
; CS8900
;-------------------------------------------------------------
"IoBaseAddress"=dword:BE300300



okay,it may be so long for u for check,
all of above are the changes I made,
maybe there are some mistakes,
any suggestion will be appreciated,
thank u very much.

blueYork
Mon Jun 09 18:05:39 PDT 2008

hi all,since the changes above did not work out.
so I just try another way to solve the problem.
I modified the following files:
1，cfwxsc1.c
BOOL OEMGetExtensionDRAM(LPDWORD lpMemStart, LPDWORD lpMemLen)
{
*lpMemStart = 0x84000000;
*lpMemLen = 0x02000000;
return TRUE;
}

2,fwxsc1.s
orr r3, r3, #MDCNFG_DE1

3,memmap.inc
DCD SDRAM_BASE_C_VIRTUAL, SDRAM_BASE_PHYSICAL, 96

4,xsc1bd.inc
MDCNFG_VAL EQU 0x19C319C3

after then ,my system can work properly,
but in the control panel,
the ram did not increase any more,
anyone tell me the reason?
thank u very much.