128M sdram configuration

dear all,
I know this might be an old question for u guys,
but I really met some troubles within it.

My platform is:
CPU : Xscale
OS : Windows CE .Net 4.2
Flash : 32MB
SDRAM : 128MB (32MBX4)

Now I want to set the configuration of 128M SDRAM.
following some suggestions,I modified the some files below,
but it does not work..
now,I list my main modification:
//////////////////////////////////////
config.bib
//////////////////////////////////////
MEMORY
IF IMGFLASH !
NK 800B8000 02000000 RAMIMAGE
RAM 820B8000 05C00000 RAM
EDBG 87F8D000 00020000 RESERVED
ENDIF
AUD_DMA 87CB8000 0000A000 RESERVED
SLEEP_SAV 87CC2000 00001000 RESERVED
DRV_GLB 87CC3000 00001000 RESERVED
CACHE_FLG 87CC4000 0003C000 RESERVED
DISPLAY 87D00000 00130000 RESERVED
BLOCK_BUF 87E30000 00080000 RESERVED
UNUSED_BUF 87EB0000 000DD000 RESERVED

whql_sig 00000001 00002000 EXTENSION
ZBANK 88000000 00100000 RESERVED

CONFIG
IF IMGFLASH !
AUTOSIZE=ON
ENDIF

IF IMGFLASH !
ROMSTART=800B8000
ROMWIDTH=32
ENDIF
ROMSIZE=01D00000

/////////////////////////////////
memmap.inc
////////////////////////////////
DCD SDRAM_BASE_C_VIRTUAL,SDRAM_BASE_PHYSICAL,128
DCD ZBANK_BASE_C_VIRTUAL, ZBANK_BASE_PHYSICAL, 1 DCD
MEMC_BASE_C_VIRTUAL, MEMC_BASE_PHYSICAL, 1 DCD
PERIF_BASE_C_VIRTUAL, PERIF_BASE_PHYSICAL,32 DCD
PCMCIA_S0_IO_C_VIRTUAL, PCMCIA_S0_IO_PHYSICAL, 32 DCD
PCMCIA_S0_ATTR_C_VIRTUAL, PCMCIA_S0_ATTR_PHYSICAL, 32
DCD PCMCIA_S0_CMN_C_VIRTUAL, PCMCIA_S0_CMN_PHYSICAL,
64
DCD PCMCIA_S1_IO_C_VIRTUAL, PCMCIA_S1_IO_PHYSICAL,32
DCD PCMCIA_S1_ATTR_C_VIRTUAL, PCMCIA_S1_ATTR_PHYSICAL,
32
DCD PCMCIA_S1_CMN_C_VIRTUAL, PCMCIA_S1_CMN_PHYSICAL,
64
DCD LCD_BASE_C_VIRTUAL,
LCD_BASE_PHYSICAL, 1
DCD BOOT_FLASH_BASE_C_VIRTUAL, BOOT_FLASH_BASE_PHYSICAL,
32
DCD CS8900A_BASE_C_VIRTUAL, CS8900A_BASE_PHYSICAL,
1
DCD XHYPER255B_PERI_C_VIRTUAL, XHYPER255B_PERI_PHYSICAL, 5
DCD CY7C67300_BASE_C_VIRTUAL,
CY7C67300_BASE_PHYSICAL, 1
DCD nCS4_BASE_C_VIRTUAL,
nCS4_BASE_PHYSICAL, 8
DCD nCS5_BASE_C_VIRTUAL,
nCS5_BASE_PHYSICAL, 8
DCD 0x00000000, 0x00000000, 0

then,I changed xsc1.h,xsc1.inc,xsc1bd.h,xsc1bd.inc to
be in sync with config.bib and OEMAddressTable,
and I checked a lot ,there's no problem with them.
///////////////////////////////////////////////////////////////////////
and in memdefs.h, I was a little confused about the codes below:
and I modified the two values which I marked to sync.
///////////////////////////////////////////////
#ifndef SABINAL
//
// Cotulla-32 Defs
//

#define MEM_BASE_PHYSICAL 0xA3CB8000
#define MEM_BASE_C_VIRTUAL 0x87CB8000 //modifed
#define EDBG_PHYSICAL_MEMORY_START 0x87F8D000 //modifed
#else
//
// Sabinal Defs
//this seems not used,so I do not modify the value
#define MEM_BASE_PHYSICAL 0xA1CB8000
#define MEM_BASE_C_VIRTUAL 0x81CB8000
#define EDBG_PHYSICAL_MEMORY_START 0x81F8D000
#endif

///////////////////////////////////////////
in the end,I also changed the value in xsc1bd.inc
MDCNFG_VAL EQU 0x0AC80ACB
; Setup default MDCNFG value for 128MB SDRAM

when all of them had done,I download the NK.bin,
and the debug information shows:

rom_offset=0x0.
Found pTOC signature.
ROMHDR at Address 800B8044h
RomHdr.ulRAMStart=81C50000h RomHdr.physfirst=800B8000h.
Done.
Writing 0x80076BD8 to flash address 0xB8340000 (length=0xA40).
Sector=0x200 (Length=0x6) Block=0x1 (Length=0x1).
Handling non-block aligned data...
FlashErase: Unlocking flash block(s) [0x1, 0x1] (please wait): Done.
Erasing flash block(s) [0x1, 0x1] (please wait): .Done.
Writing to flash (please wait): Done.
Got EDBG_CMD_JUMPIMG
Got EDBG_CMD_CONFIG, flags:0x00000000
Download successful! Jumping to image at physical 0xA00B9000...
Begin
******************************************************
******************************************************
******************************************************
******************************************************
******************************************************
OEMInitDebugSerial using UART2
Windows CE Kernel for ARM Built on Mar 13 2003 at 22:54:19
ProcessorType=02d0 Revision=6
sp_abt=ffff5000 sp_irq=ffff2800 sp_undef=ffffc800 OEMAddressTable =
800b9ef4


as u see,my system hang at last,
if in normal,sp=ffffc7cc should be printed behind
OEMAddressTable = 800b9ef4
but now,system hang there....

Anybody has experience ?
could u give me some advice?
I so appreciate it, thank u a lot.

K
Mon Apr 28 16:57:55 PDT 2008

In many cases, the MDCNFG was configured in XLLP code which was prebuilt in
CSP tree so that no matter how you changed the value it will not be
compiled.
While you might ask for how to rebuild the CSP, due to it is a prebuilt
code, instead of trying to rebuild it, you shall clone the XLLP code into
your BSP.

<yaoronger@tom.com> wrote in message
news:b8a7a707-d218-4cdf-ac00-bf088a0f7059@u36g2000prf.googlegroups.com...
> dear all,
> I know this might be an old question for u guys,
> but I really met some troubles within it.
>
> My platform is:
> CPU : Xscale
> OS : Windows CE .Net 4.2
> Flash : 32MB
> SDRAM : 128MB (32MBX4)
>
> Now I want to set the configuration of 128M SDRAM.
> following some suggestions,I modified the some files below,
> but it does not work..
> now,I list my main modification:
> //////////////////////////////////////
> config.bib
> //////////////////////////////////////
> MEMORY
> IF IMGFLASH !
> NK 800B8000 02000000 RAMIMAGE
> RAM 820B8000 05C00000 RAM
> EDBG 87F8D000 00020000 RESERVED
> ENDIF
> AUD_DMA 87CB8000 0000A000 RESERVED
> SLEEP_SAV 87CC2000 00001000 RESERVED
> DRV_GLB 87CC3000 00001000 RESERVED
> CACHE_FLG 87CC4000 0003C000 RESERVED
> DISPLAY 87D00000 00130000 RESERVED
> BLOCK_BUF 87E30000 00080000 RESERVED
> UNUSED_BUF 87EB0000 000DD000 RESERVED
>
> whql_sig 00000001 00002000 EXTENSION
> ZBANK 88000000 00100000 RESERVED
>
> CONFIG
> IF IMGFLASH !
> AUTOSIZE=ON
> ENDIF
>
> IF IMGFLASH !
> ROMSTART=800B8000
> ROMWIDTH=32
> ENDIF
> ROMSIZE=01D00000
>
> /////////////////////////////////
> memmap.inc
> ////////////////////////////////
> DCD SDRAM_BASE_C_VIRTUAL,SDRAM_BASE_PHYSICAL,128
> DCD ZBANK_BASE_C_VIRTUAL, ZBANK_BASE_PHYSICAL, 1 DCD
> MEMC_BASE_C_VIRTUAL, MEMC_BASE_PHYSICAL, 1 DCD
> PERIF_BASE_C_VIRTUAL, PERIF_BASE_PHYSICAL,32 DCD
> PCMCIA_S0_IO_C_VIRTUAL, PCMCIA_S0_IO_PHYSICAL, 32 DCD
> PCMCIA_S0_ATTR_C_VIRTUAL, PCMCIA_S0_ATTR_PHYSICAL, 32
> DCD PCMCIA_S0_CMN_C_VIRTUAL, PCMCIA_S0_CMN_PHYSICAL,
> 64
> DCD PCMCIA_S1_IO_C_VIRTUAL, PCMCIA_S1_IO_PHYSICAL,32
> DCD PCMCIA_S1_ATTR_C_VIRTUAL, PCMCIA_S1_ATTR_PHYSICAL,
> 32
> DCD PCMCIA_S1_CMN_C_VIRTUAL, PCMCIA_S1_CMN_PHYSICAL,
> 64
> DCD LCD_BASE_C_VIRTUAL,
> LCD_BASE_PHYSICAL, 1
> DCD BOOT_FLASH_BASE_C_VIRTUAL, BOOT_FLASH_BASE_PHYSICAL,
> 32
> DCD CS8900A_BASE_C_VIRTUAL, CS8900A_BASE_PHYSICAL,
> 1
> DCD XHYPER255B_PERI_C_VIRTUAL, XHYPER255B_PERI_PHYSICAL, 5
> DCD CY7C67300_BASE_C_VIRTUAL,
> CY7C67300_BASE_PHYSICAL, 1
> DCD nCS4_BASE_C_VIRTUAL,
> nCS4_BASE_PHYSICAL, 8
> DCD nCS5_BASE_C_VIRTUAL,
> nCS5_BASE_PHYSICAL, 8
> DCD 0x00000000, 0x00000000, 0
>
> then,I changed xsc1.h,xsc1.inc,xsc1bd.h,xsc1bd.inc to
> be in sync with config.bib and OEMAddressTable,
> and I checked a lot ,there's no problem with them.
> ///////////////////////////////////////////////////////////////////////
> and in memdefs.h, I was a little confused about the codes below:
> and I modified the two values which I marked to sync.
> ///////////////////////////////////////////////
> #ifndef SABINAL
> //
> // Cotulla-32 Defs
> //
>
> #define MEM_BASE_PHYSICAL 0xA3CB8000
> #define MEM_BASE_C_VIRTUAL 0x87CB8000 //modifed
> #define EDBG_PHYSICAL_MEMORY_START 0x87F8D000 //modifed
> #else
> //
> // Sabinal Defs
> //this seems not used,so I do not modify the value
> #define MEM_BASE_PHYSICAL 0xA1CB8000
> #define MEM_BASE_C_VIRTUAL 0x81CB8000
> #define EDBG_PHYSICAL_MEMORY_START 0x81F8D000
> #endif
>
> ///////////////////////////////////////////
> in the end,I also changed the value in xsc1bd.inc
> MDCNFG_VAL EQU 0x0AC80ACB
> ; Setup default MDCNFG value for 128MB SDRAM
>
> when all of them had done,I download the NK.bin,
> and the debug information shows:
>
> rom_offset=0x0.
> Found pTOC signature.
> ROMHDR at Address 800B8044h
> RomHdr.ulRAMStart=81C50000h RomHdr.physfirst=800B8000h.
> Done.
> Writing 0x80076BD8 to flash address 0xB8340000 (length=0xA40).
> Sector=0x200 (Length=0x6) Block=0x1 (Length=0x1).
> Handling non-block aligned data...
> FlashErase: Unlocking flash block(s) [0x1, 0x1] (please wait): Done.
> Erasing flash block(s) [0x1, 0x1] (please wait): .Done.
> Writing to flash (please wait): Done.
> Got EDBG_CMD_JUMPIMG
> Got EDBG_CMD_CONFIG, flags:0x00000000
> Download successful! Jumping to image at physical 0xA00B9000...
> Begin
> ******************************************************
> ******************************************************
> ******************************************************
> ******************************************************
> ******************************************************
> OEMInitDebugSerial using UART2
> Windows CE Kernel for ARM Built on Mar 13 2003 at 22:54:19
> ProcessorType=02d0 Revision=6
> sp_abt=ffff5000 sp_irq=ffff2800 sp_undef=ffffc800 OEMAddressTable =
> 800b9ef4
>
>
> as u see,my system hang at last,
> if in normal,sp=ffffc7cc should be printed behind
> OEMAddressTable = 800b9ef4
> but now,system hang there....
>
> Anybody has experience ?
> could u give me some advice?
> I so appreciate it, thank u a lot.

yaoronger
Mon Apr 28 18:04:14 PDT 2008

Hi,K.S.Huang
thank u for your reply.
actually,I am a new guy towards wince,
and I don't wanna build csp if necessary,
all I want is just increase my sdram,
would u give me some hints according to my modifed files,
and whether there are some place I missed,
thank u very much.

K
Mon Apr 28 18:14:02 PDT 2008

Since I don't have the CE 4.2 source tree , the XLLP code for CE5 could be
found in PUBLIC\COMMON\OAK\CSP\ARM\INTEL\PXA27X\XLLP and I assume it should
be the same for CE 4.2.
Just try to clone it into your BSP tree and have some modification to the
DIRS and SOURCES file to make it compile correctly and make sure your kernel
and eboot do link with the new XLLP code.

<yaoronger@tom.com> wrote in message
news:27317a84-e089-4997-83b0-8266457fbbdc@k10g2000prm.googlegroups.com...
> Hi,K.S.Huang
> thank u for your reply.
> actually,I am a new guy towards wince,
> and I don't wanna build csp if necessary,
> all I want is just increase my sdram,
> would u give me some hints according to my modifed files,
> and whether there are some place I missed,
> thank u very much.

yaoronger
Mon Apr 28 18:22:58 PDT 2008

well,
according to the correlative topic on forum here,
the suggestion of increasing sdram is:
"You have only to modify the OEMAddressTable, the config.bib and the
addresses in XSC1.h, XSC1.inc and some "hardcoded" address registry
settings
for the serial ports."
and i am not sure what the sentence
"modify "hardcoded" address registry settings for the serial ports"
means?
actually i haven't modified it yet,
anyone knows? is it in platform.reg?

yaoronger
Mon Apr 28 19:13:18 PDT 2008

dear K.S.Huang,
I have checked the catalog already,
F:\WINCE420\PUBLIC\COMMON\OAK\CSP\ARM\XSCALE
but it seems that i never changed any files there,
i can not find the MDCNFG_VAL in any of files there,
it looks like MDCNFG_VAL is only in xsc1bd.inc...
and u said clone csp location to my bsp must be below:
F:\WINCE420\PLATFORM\XSBase255\KERNEL\BUILDEXE
is it right?

K
Mon Apr 28 19:41:48 PDT 2008

Well, it seems that I was assuming you are using PXA27x while you are using
PXA25x series.
So forget about what I said before for the XLLP which is for PXA27x.
Another quesiton for you, how Parition are you using? I assume it should be
2.
As far as I can remember, the original code only enable parition 0 and if
you are utilzie the parition 1, you will need to morify your boot code to
enable it as well...
Maybe have a line like

orr r3, r3, #MDCNFG_DE0
orr r3, r3, #MDCNFG_DE1

in your KERNEL\HAL\ARM\fwXsc1.s
instead of

orr r3, r3, #MDCNFG_DE0

that only enable one partition


<yaoronger@tom.com> wrote in message
news:eedb5879-9ed4-4f84-a3cc-a82eaaea9814@b9g2000prh.googlegroups.com...
> dear K.S.Huang,
> I have checked the catalog already,
> F:\WINCE420\PUBLIC\COMMON\OAK\CSP\ARM\XSCALE
> but it seems that i never changed any files there,
> i can not find the MDCNFG_VAL in any of files there,
> it looks like MDCNFG_VAL is only in xsc1bd.inc...
> and u said clone csp location to my bsp must be below:
> F:\WINCE420\PLATFORM\XSBase255\KERNEL\BUILDEXE
> is it right?

blueYork
Mon Apr 28 23:58:35 PDT 2008

yes,u are right,i just use pxa255 for the mcu.
follow your advice,i found the file fwXsc1.s u mentioned,
and modified the file below:
; get memory controller base address;
ldr r1, =MEMC_BASE_PHYSICAL
; fetch current mdcnfg value
ldr r3, [r1, #MDCNFG_OFFSET]
; enable sdram bank 0 if installed (must do for any populated bank)
orr r3, r3, #MDCNFG_DE0
; write back mdcnfg, enabling the sdram bank(s)
str r3, [r1, #MDCNFG_OFFSET]

; blue add
ldr r1, =MEMC_BASE_PHYSICAL
ldr r3, [r1, #MDCNFG_OFFSET]
orr r3, r3, #MDCNFG_DE1
str r3, [r1, #MDCNFG_OFFSET]
;add above

am I right?
when i download the NK.bin,it still hang "OEMAddressTable = 800b9ef4"
there
besides modify above,should i modify platform.reg?
since there are some hardcoded address registry settings for the
serial ports,
such as
;-------------------------------------------------------------
; Serial2 : It is UART_A
;-------------------------------------------------------------
[HKEY_LOCAL_MACHINE\Drivers\BuiltIn\Serial2]
"Dll"="my_serial.Dll"
"IoBase"=dword:bcc00000 ;UART_A_BASE_U_VIRTUAL
"IoLen"=dword:24

anyway,thank u a lot for your suggestion.

K
Tue Apr 29 11:45:03 PDT 2008

It looks good to me, and actually, you could have the

orr r3, r3, #MDCNFG_DE1

statement just inserted to the following of

orr r3, r3, #MDCNFG_DE0

So that you don't have to access MDCNFG register twice.
And for the registry settings...
A thumb of the rule is when ever you modify the address mapping of your
peripheral address space, you should make a corresponding change in your
platform.reg.


"blueYork" <yaoronger@tom.com> wrote in message
news:a519af84-9de8-4465-842e-9ee28b5c714a@j33g2000pri.googlegroups.com...
> yes,u are right,i just use pxa255 for the mcu.
> follow your advice,i found the file fwXsc1.s u mentioned,
> and modified the file below:
> ; get memory controller base address;
> ldr r1, =MEMC_BASE_PHYSICAL
> ; fetch current mdcnfg value
> ldr r3, [r1, #MDCNFG_OFFSET]
> ; enable sdram bank 0 if installed (must do for any populated bank)
> orr r3, r3, #MDCNFG_DE0
> ; write back mdcnfg, enabling the sdram bank(s)
> str r3, [r1, #MDCNFG_OFFSET]
>
> ; blue add
> ldr r1, =MEMC_BASE_PHYSICAL
> ldr r3, [r1, #MDCNFG_OFFSET]
> orr r3, r3, #MDCNFG_DE1
> str r3, [r1, #MDCNFG_OFFSET]
> ;add above
>
> am I right?
> when i download the NK.bin,it still hang "OEMAddressTable = 800b9ef4"
> there
> besides modify above,should i modify platform.reg?
> since there are some hardcoded address registry settings for the
> serial ports,
> such as
> ;-------------------------------------------------------------
> ; Serial2 : It is UART_A
> ;-------------------------------------------------------------
> [HKEY_LOCAL_MACHINE\Drivers\BuiltIn\Serial2]
> "Dll"="my_serial.Dll"
> "IoBase"=dword:bcc00000 ;UART_A_BASE_U_VIRTUAL
> "IoLen"=dword:24
>
> anyway,thank u a lot for your suggestion.

blueYork
Wed Apr 30 17:52:53 PDT 2008

it is so kind of u,K. S. Huang,
i have a try yesterday,but it still hung there,
i guess there are some stupid mistake which i ignored
thank u very much,and i will tell u the whole report
after i work it out.