open bank and other optimizations

Hi,

I want to take adventage of the open bank and open row policy
available in the processor (it can keep 4 banks open per bank, for a
total of 12 banks at a time) that I am using (AU1xxx), by locating
code, data, etc. on separete SDRAM bank and row boundaries.

The processor's documentation says that it can be done using the
linker, to indicate aligment of the various sections.

The PB and VS compiler allows to do that with:

#pragma comment(linker, "/SECTION:name, ALIGN=#")

My problem is, I do no understand how all this fit together. For
example, how can I use this technique to align network buffers or
program code on an SDRAM bank boundary (i.e. a 128 MB SDRAM with 32 MB
bank size and 4 KB row size)?

Thanks a lot for your help.

Alex

PS: Any tips in finding way to reduce the working set of my
application under WinCE?