Hello Experts
I am using a Intel PXA270 processor with MainstoneII platform, Wince
5.0 for our project. When our image was initially built for 64MB RAM
it is working fine. When in tried to configure for
128 MB RAM, the images is not getting launched and it hangs at the
below point.
ROMHDR at Address 80100044h
Download successful! Jumping to image at 0x80101000 (physical
0xA0101000)...
Got EDBG_CMD_JUMPIMG
Got EDBG_CMD_CONFIWindows CE Kernel for ARM (Thumb Enabled) Built on
Jun 24 2004
at 18:25:00
ProcessorType=0411 Revision=7
sp_abt=ffff5000 sp_irq=ffff2800 sp_undef=ffffc800 OEMAddressTable =
80105a94
Here are my changes done for 128 MB RAM configuration.
config.bib:
MEMORY
IF IMGFLASH!
; Name Start Size Type
; ------- -------- -------- ----
RSVD 80000000 000FF000 RESERVED
ARGS 800FF000 00001000 RESERVED
NK 80100000 03000000 RAMIMAGE
RAM 83100000 04B00000 RAM
mainstoneii.inc:
MAINSTONEII_SIZE_SDRAM EQU 0x08000000
MDCNFG_VAL EQU 0x00000ACB ; SDRAM Config Reg (CL=3, Normal
Addressing, 4 Banks, 13 row bits, 9 col bits, 32-bit port width)
MDREFR_VAL EQU 0x2093A01E ; SDRAM Refresh Reg
(SDCLK[0]=MemClk/4, APD, SDCLK[1]=MemClk/2, DRI=x01E (7.62us
refreshes))
oebaddrtab_cfg.inc:
g_oalAddressTable
DCD 0x80000000, 0xA0000000, 64 ; SDRAM bank 0 (64MB).
DCD 0x84000000, 0xA4000000, 64 ; SDRAM bank 1 (64MB).
DCD 0x88000000, 0x5C000000, 1 ; Internal memory
storage(256KB).
DCD 0x88100000, 0x58000000, 1 ; Internal memory
control.
DCD 0x88200000, 0x4C000000, 1 ; USB host.
DCD 0x88300000, 0x48000000, 1 ; Memory control
Memory-mapped registers.
DCD 0x88400000, 0x44000000, 1 ; LCD Memory-mapped
registers.
DCD 0x88500000, 0x40000000, 32 ; peripherals Memory-
mapped registers.
DCD 0x8A500000, 0x3C000000, 16 ; PCMCIA S1 common
memory space.
DCD 0x8B500000, 0x38000000, 32 ; PCMCIA S1 attribute
memory space.
DCD 0x8D500000, 0x30000000, 1 ; PCMCIA S1 I/O space.
DCD 0x8D600000, 0x2C000000, 16 ; PCMCIA S0 common
memory space.
DCD 0x8E600000, 0x28000000, 32 ; PCMCIA S0 attribute
memory space.
DCD 0x90600000, 0x20000000, 1 ; PCMCIA S0 I/O space.
DCD 0x90700000, 0xE0000000, 1 ; Zero-bank (in
reserved slot - no physical memory required).
DCD 0x90800000, 0x14000000, 1 ; nCS5: eXpansion
board header.
DCD 0x90900000, 0x10000000, 1 ; nCS4: Ethernet
controller.
DCD 0x90A00000, 0x0A000000, 1 ; nCS2 (upper half):
2MB SRAM.
DCD 0x90B00000, 0x08000000, 1 ; nCS2 (lower half):
Board registers (FPGA).
DCD 0x90C00000, 0x04000000, 64 ; nCS1: Storage(64MB).
DCD 0x94C00000, 0x00000000, 64 ; nCS0: Boot Flash1
(64MB).
Is this configuration changes enough or should i need to change the
values of xlli_MDCNFG_value and xlli_MDREFR_value in the file
xlli_mainstone_defs.inc
Thanks & regards
Aravind