Having trouble debugging with Majic JTAG and Platform Builder

I was able to flash my eboot. I can step normally in monice.

However, if I use Platform builder, all the flash memory seems to have 00B0
in the hiword.

If using the monitor window I set byte 0 to the appropriate jump
instruction, the memory seems to be fixed until I again see the message
"Software Breakpoint was promoted to hardware breakpoint"

Maybe a hardware problem - or maybe a debug setup problem? Using the same
config files for monice and Wince still has the same problem.

Steve
Tue May 16 11:22:23 CDT 2006

You'd need to post your config files. What CPU? What platform? PB needs
certain settings that are not required (and may not be desired) for monice.

--
Steve Maillet
EmbeddedFusion
www.EmbeddedFusion.com
smaillet at EmbeddedFusion dot com

johnnypav
Tue May 16 12:21:01 CDT 2006

Its a PXA270 with a custom board which is similar to the Mainstone.
So, I tried the mainstone_wince config files that came with the majic. (only
change is ice_power-sense = trst)
I also tried the mainstone config files as well as a mostly commented out
version.
All worked to step through in monice and none worked in PB.

Here are the default majic config files for wince:


+q // Enter quiet mode
+mon
//___________________________________________________________________
// startice.cmd: Created by MAJIC Setup Wizard version 3.5b
// Creation Date: 11/18/2004
// Processor type: XScale_pxa270 (Bulverde) -vpxa270
// Project: Mainstone WinCE
// Description: Mainstone Reference Platform with Windows CE
//___________________________________________________________________
dv "Reading startice.cmd file\n"
//
// Software Settings
//
eo semi_hosting_enabled= on // Semihosting support
eo semi_hosting_vector = 0x8 // Use default vector for Semihosting
eo vector_catch = 0x3b // Set Vector Catch
eo top_of_memory = 0xA4000000 // top of available memory on target
//
// Target Information Options
//
eo reset_at_load = off // Reset cpu/target at load time
eo trgt_resets_jtag = no // Target reset does not reset JTAG controller
//
// MAJIC Settings
//
eo ice_jtag_clock_freq= 20 // JTAG clock frequency (MHz)
eo ice_jtag_use_rtclk = off // TCK is free-running
eo ice_jtag_use_trst = on // Use TRST* to reset JTAG controller
eo ice_reset_output = off // reset command does not pulse MAJICs reset
output
eo ice_power_sense = trst // Sense target voltage level on VREF pin (tpmc
is trst)
//
// Run board initialization command file
//
dv "Reading mainstone_wince.cmd\n"
fr c mainstone_wince.cmd
dv "Finished reading mainstone_wince.cmd\n"
//
// Aliases for mmu dumping and virtual->physical translation
//
ea MMU_DUMP fr c xdmp.cmd
ea MMU_XLATE fr c xlat.cmd
//
dv "Finished reading startice.cmd\n"
-mon

=================================================


+q
+mon
//___________________________________________________________________
// Mainstone board initialization file for Windows CE
// Refer to "Using MAJIC with the Intel(r) XScale(tm) Micro-Architecture"
// application note for information on managing exception vectors.
//___________________________________________________________________
//
if $$0 == 0 { goto ONE_TIME_SETUP } // If NO parameters passed, goto One
Time Setup logic
if $$1 == 1 { goto USER_INIT_RTI } // If 1st parameter passed == 1,
Reset Target and Initialize
if $$1 == 2 { goto USER_INIT_RTNI } // If 1st parameter passed == 2,
Reset Target w/o Initialize
if $$1 == 3 { goto USER_INIT_TI } // If 1st parameter passed == 3,
Target Initialize w/o reset
//___________________________________________________________________
:ONE_TIME_SETUP
//
ea RTI fr c mainstone_wince.cmd 1 // RTI runs USER_INIT_RTI script
(Reset Target and Initialize)
ea RTNI fr c mainstone_wince.cmd 2 // RTNI runs USER_INIT_RTNI script
(Reset Target w/o Initialize)
ea TI fr c mainstone_wince.cmd 3 // TI runs USER_INIT_TI script
(Target Initialize w/o reset)
//
eo trgt_little_endian = on // Target has little endian memory
system
//
// Tell MAJIC to use User Supplied Exception Vectors.
eo vector_load_low = user // low vector table handling
eo vector_load_high = user // high vector table handling
//
// Configure Exception Vectors for WinCE.
//:USER_VECTORS_LO
// Low vectors are NOT used or needed for WinCE. However, the Vector_Load_Low
// option is set to USER so MAJIC will not load them from the target memory at
// virtual addresses 0x0-0x1C.
//
//:USER_VECTORS_HI
ew MAJIC_VHIGH_U = 0xE59FF3D8 // Undefined Instruction
ew MAJIC_VHIGH_S = 0xE59FF3D8 // Software Interrupt
ew MAJIC_VHIGH_P = 0xE59FF3D8 // Prefetch Abort
ew MAJIC_VHIGH_A = 0xE59FF3D8 // Data Abort
ew MAJIC_VHIGH_R = 0xE6000010 // Unused Vector Location
ew MAJIC_VHIGH_I = 0xE59FF3D8 // IRQ
ew MAJIC_VHIGH_F = 0xE59FF3D8 // FIQ
//
//
// ____User Supplied One Time Commands Go Here____
//
//
goto USER_INIT_TI // end of one-time script
//
//___________________________________________________________________
:USER_INIT_RTNI
dv "Executing RTNI Commands\n"
rt
//
// ____User Supplied RTNI Commands Go Here____
//
//
goto EXIT // Skip Target Init
//
//___________________________________________________________________
:USER_INIT_RTI
dv "Executing RTI Commands\n"
rt
//
// ____User Supplied RTI Commands Go Here____
//
//
// Fall through to TI part of RTI
//___________________________________________________________________
:USER_INIT_TI
//
ew $trgt_cpu_state = @.1MAJIC_DO_CPU_STATE
if (@$trgt_cpu_state != 1) { dv "Target Initialization commands skipped due
to CPU state\n"; doq TCS; goto EXIT }
//
//
// ____User Supplied Target Init Commands Go Here____
//
//
//___________________________________________________________________
ew c15_15 = 0xC3 // Enable access to Coprocessor 0, 1, 6, 7
//___________________________________________________________________
:EXIT
-mon
// <eof>