Hi, i have the common scneario in that i have a few level triggered
ints wired in to one of the PXA270 GPIOXX_2 lines. I have seen in the
archives a suggested solution is to treat this as a shared interrupt
and call NKcallIntChian. I was wondering why this complexity

Can it not jut be done by in the ISR checking the GPIOXX_2
bit in the ICMR then further checking which one of the io lines
it is. Then disabling the interrupt at the peripheral device, this prevents
rentrency in to the IST. Once the interrupt is processed reeenable the
interrupt at the device say in the InterruptDone. Pending interrupts in
the device will raise an edge again. This solves missing edges and
reentrancy
issues surely or have i missed something?

I thought NKcallInt Chain was more for PCI devices where you have
different cards plugged in at any give time. In my scenario i have fixed
hardware.

Re: Edge triggered interrupts by Dean

Dean
Wed Jul 19 11:42:46 CDT 2006

> Once the interrupt is processed reeenable the
> interrupt at the device say in the InterruptDone. Pending interrupts in
> the device will raise an edge again. This solves missing edges and
> reentrancy

You said you have level interrupts. Re-enabling the interrupts at the
device will not cause an edge, they remain at level. Since the CPU doesn't
support level interrupts you don't get interrupted again to service the
remaining interrupt.

--
Dean Ramsier - eMVP
BSQUARE Corporation


"at" <at@hotmail.com> wrote in message
news:OZ$s4T0qGHA.5108@TK2MSFTNGP05.phx.gbl...
> Hi, i have the common scneario in that i have a few level triggered
> ints wired in to one of the PXA270 GPIOXX_2 lines. I have seen in the
> archives a suggested solution is to treat this as a shared interrupt
> and call NKcallIntChian. I was wondering why this complexity
>
> Can it not jut be done by in the ISR checking the GPIOXX_2
> bit in the ICMR then further checking which one of the io lines
> it is. Then disabling the interrupt at the peripheral device, this
> prevents
> rentrency in to the IST. Once the interrupt is processed reeenable the
> interrupt at the device say in the InterruptDone. Pending interrupts in
> the device will raise an edge again. This solves missing edges and
> reentrancy
> issues surely or have i missed something?
>
> I thought NKcallInt Chain was more for PCI devices where you have
> different cards plugged in at any give time. In my scenario i have fixed
> hardware.
>
>



Re: Edge triggered interrupts by at

at
Wed Jul 19 11:53:17 CDT 2006

Point taken Dean, what advantage does using Shared interrupts
via NKCallIntChain give over simply acknowledgin the GPIOXX_2
interrupt (not disabling) in the ISR. Does it solve the re-entrancy issue?


"Dean Ramsier" <ramsiernospam@nospam.com> wrote in message
news:e9VbxI1qGHA.3380@TK2MSFTNGP04.phx.gbl...
>> Once the interrupt is processed reeenable the
>> interrupt at the device say in the InterruptDone. Pending interrupts in
>> the device will raise an edge again. This solves missing edges and
>> reentrancy
>
> You said you have level interrupts. Re-enabling the interrupts at the
> device will not cause an edge, they remain at level. Since the CPU
> doesn't support level interrupts you don't get interrupted again to
> service the remaining interrupt.
>
> --
> Dean Ramsier - eMVP
> BSQUARE Corporation
>
>
> "at" <at@hotmail.com> wrote in message
> news:OZ$s4T0qGHA.5108@TK2MSFTNGP05.phx.gbl...
>> Hi, i have the common scneario in that i have a few level triggered
>> ints wired in to one of the PXA270 GPIOXX_2 lines. I have seen in the
>> archives a suggested solution is to treat this as a shared interrupt
>> and call NKcallIntChian. I was wondering why this complexity
>>
>> Can it not jut be done by in the ISR checking the GPIOXX_2
>> bit in the ICMR then further checking which one of the io lines
>> it is. Then disabling the interrupt at the peripheral device, this
>> prevents
>> rentrency in to the IST. Once the interrupt is processed reeenable the
>> interrupt at the device say in the InterruptDone. Pending interrupts in
>> the device will raise an edge again. This solves missing edges and
>> reentrancy
>> issues surely or have i missed something?
>>
>> I thought NKcallInt Chain was more for PCI devices where you have
>> different cards plugged in at any give time. In my scenario i have fixed
>> hardware.
>>
>>
>
>



Re: Edge triggered interrupts by Dean

Dean
Wed Jul 19 13:44:27 CDT 2006

Not to my knowledge. I've never seen that recommended, and haven't thought
about it might work.

The point might be that if you're using shared interrupts then you should be
using NKCallIntChain to handle the sharing. What it doesn't say is that you
also need some way to cause another interrupt to be generated so
NKCallIntChain will be able to do it's job.

--
Dean Ramsier - eMVP
BSQUARE Corporation


"at" <at@hotmail.com> wrote in message
news:OEKYXP1qGHA.3256@TK2MSFTNGP04.phx.gbl...
> Point taken Dean, what advantage does using Shared interrupts
> via NKCallIntChain give over simply acknowledgin the GPIOXX_2
> interrupt (not disabling) in the ISR. Does it solve the re-entrancy issue?
>
>
> "Dean Ramsier" <ramsiernospam@nospam.com> wrote in message
> news:e9VbxI1qGHA.3380@TK2MSFTNGP04.phx.gbl...
>>> Once the interrupt is processed reeenable the
>>> interrupt at the device say in the InterruptDone. Pending interrupts in
>>> the device will raise an edge again. This solves missing edges and
>>> reentrancy
>>
>> You said you have level interrupts. Re-enabling the interrupts at the
>> device will not cause an edge, they remain at level. Since the CPU
>> doesn't support level interrupts you don't get interrupted again to
>> service the remaining interrupt.
>>
>> --
>> Dean Ramsier - eMVP
>> BSQUARE Corporation
>>
>>
>> "at" <at@hotmail.com> wrote in message
>> news:OZ$s4T0qGHA.5108@TK2MSFTNGP05.phx.gbl...
>>> Hi, i have the common scneario in that i have a few level triggered
>>> ints wired in to one of the PXA270 GPIOXX_2 lines. I have seen in the
>>> archives a suggested solution is to treat this as a shared interrupt
>>> and call NKcallIntChian. I was wondering why this complexity
>>>
>>> Can it not jut be done by in the ISR checking the GPIOXX_2
>>> bit in the ICMR then further checking which one of the io lines
>>> it is. Then disabling the interrupt at the peripheral device, this
>>> prevents
>>> rentrency in to the IST. Once the interrupt is processed reeenable the
>>> interrupt at the device say in the InterruptDone. Pending interrupts in
>>> the device will raise an edge again. This solves missing edges and
>>> reentrancy
>>> issues surely or have i missed something?
>>>
>>> I thought NKcallInt Chain was more for PCI devices where you have
>>> different cards plugged in at any give time. In my scenario i have fixed
>>> hardware.
>>>
>>>
>>
>>
>
>



Re: Edge triggered interrupts by Steve

Steve
Thu Jul 20 08:51:11 CDT 2006

Both are valid approaches, which you use is really up to you. Using
NkCallIntCHain allows adding drivers at run time, if you don't need that
functionality then you can process the second level interrupts directly in
your ISR as you describe.

--
Steve Maillet
EmbeddedFusion
www.EmbeddedFusion.com
smaillet at EmbeddedFusion dot com



Re: Edge triggered interrupts by Steve

Steve
Thu Jul 20 08:54:15 CDT 2006

In this scenario you typically just clear the interrupt at the GPI
controller and don't disable it so that new edges are always caught. But
this requires special handling in the ISR to know about what is supposed to
be treated as "level triggered" and requires the IST to disable interrupts
inside the peripheral chip wile processing the interrupt.

--
Steve Maillet
EmbeddedFusion
www.EmbeddedFusion.com
smaillet at EmbeddedFusion dot com



Re: Edge triggered interrupts by Dean

Dean
Fri Jul 21 07:56:42 CDT 2006

One method for handling level interrupts is to disable interrupts in the
device, which causes the interrupt line to be de-asserted. Handle the
interrupt then re-enable, and the other pending interrupt will then cause
the line to be reasserted. This only works if your device has the ability
to be programmed in that fashion. However, you presumably have two separate
unrelated devices that are wire or'd to the same edge sensitive pin. If
both trigger interrupts at the same time, disabling the interrupt in one
peripheral will not cause the interrupt assertion from the other device to
go away. Therefore you will still not see an edge and will not get
interrupted again.

--
Dean Ramsier - eMVP
BSQUARE Corporation


"Steve Maillet (eMVP)" <nospam1@EntelechyConsulting.com> wrote in message
news:uRVO%23PArGHA.3920@TK2MSFTNGP04.phx.gbl...
> In this scenario you typically just clear the interrupt at the GPI
> controller and don't disable it so that new edges are always caught. But
> this requires special handling in the ISR to know about what is supposed
> to be treated as "level triggered" and requires the IST to disable
> interrupts inside the peripheral chip wile processing the interrupt.
>
> --
> Steve Maillet
> EmbeddedFusion
> www.EmbeddedFusion.com
> smaillet at EmbeddedFusion dot com
>
>